Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing

• US 4,358,326 A
• Filed: 11/03/1980
• Issued: 11/09/1982
• Est. Priority Date: 11/03/1980
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Doo, Ven Y.
• Primary Examiner(s): Rutledge, L. Dewayne
• Assistant Examiner(s): Saba, W. G.
• Application Number:
  US06/203,039
• Time in Patent Office: 736 Days
• Field of Search: 148/1.5, 148/174, 29/571, 29/590, 427/86, 357/59
• US Class Current: 438/585
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02595 polycrystalline
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02634 Homoepitaxy
• CPC Class Codes: H01L 21/02667 Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
• CPC Class Codes: H01L 21/324 Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering H01L21/20 - H01L21/288 and H01L21/302 - H01L21/322 take precedence
• CPC Class Codes: H01L 21/76888 By rendering at least a portion of the conductor non conductive, e.g. oxidation
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: Y10S 148/003 Anneal
• CPC Class Codes: Y10S 148/026 Deposition thru hole in mask
• CPC Class Codes: Y10S 148/122 Polycrystalline
• CPC Class Codes: Y10S 148/123 Polycrystalline diffuse anneal
• CPC Class Codes: Y10S 148/164 Three dimensional processing

Abstract

Disclosed is a process for reducing microcracks and microvoids in the formation of polycrystalline (polysilicon) structures from initial layers of amorphous silicon by annealing. In annealing of amorphous silicon to the polycrystalline form, the crystal grains are thickness limited; and thus by maintaining the thickness below 1000 angstroms, the spacing between contrasting material forming the crystal grains can be minimized on anneal. The resultant equiaxial grains are used as seed crystals for epi-like growth of silicon from them into the required or desired layer thickness.

Claims

1. A method of forming a polycrystalline layer on an insulator coating of a silicon integrated circuit

depositing from a silicon forming gaseous phase a discrete amorphous silicon layer in a thickness not exceeding 1000 angstroms on said insulator coating at a temperature in the range of about 550°

to 600°

C.;

heating the resultant structure at a temperature of about 800°

C. to convert said amorphous silicon layer to an equiaxial polycrystalline seed layer, and

epitaxially extending the crystal grains of said polycrystalline seed layer by heating thereof in a silicon forming ambient at a temperature in the range of about 650°

to about 700°

C. for a time sufficient to grow the thickness desired.

2. The method of claim 1 wherein said insulating layer is thermally grown silicon dioxide.

3. The method of claim 1 wherein said insulating layer is a chemically vapor deposited silicon dioxide.

4. The method of claim 1 wherein said extended polycrystalline layer is doped with a conductivity type determining impurity.

22. The method of claim 1 wherein said polycrystalline seed layer has grain sizes corresponding to the thickness of said layer.

23. The method of claim 22 wherein said insulating layer is thermally grown silicon dioxide.

24. The method of claim 22 wherein said insulating layer is a chemically vapor deposited silicon dioxide.

25. The method of claim 22 wherein said extended polycrystalline layer is doped with a conductivity type determining impurity.

5. A method for forming polycrystalline layers on an insulator coating of an integrated circuit device, comprising:

forming a first polycrystalline silicon layer on said insulator coating,

forming a second insulator coating on said polycrystalline silicon layer,

depositing from a silicon forming gaseous phase a discrete amorphous silicon layer in a thickness not exceeding 1000 angstroms on said second insulator coating at a temperature in the range of about 550°

C. to about 600°

C.,

heating the resultant structure at a temperature of about 800°

C. to convert said amorphous layer to a second polycrystalline layer having equiaxial grains, and

epitaxially extending the crystal grains of said second polycrystalline layer, by heating thereof in a silicon forming ambient at a temperature in the range of about 650°

C. to about 700°

C. for a time sufficient to grow the thickness desired.

6. The method of claim 5 wherein said extended polycrystalline layer is doped with a conductivity type determining impurity.

7. The method of claim 5 wherein said second polycrystalline layer is doped.

8. The method of claim 5 including forming a third insulating coating on said second polycrystalline layer,

forming a via hole through said third insulating coating, to the second said polycrystalline layer, and

forming a conductive metal contact in said via opening.

9. The method of claim 8 wherein said second polycrystalline layer is doped.

10. The method of claim 5 wherein the first said insulating coating is a thermally grown silicon dioxide.

11. The method of claim 10 wherein said second polycrystalline layer is doped.

12. The method of claim 10 wherein at least one of said second and third insulating coatings comprises a chemically vapor deposited silicon dioxide.

13. The method of claim 12 wherein said second polycrystalline layer is doped.

14. The method of claim 5 wherein the first polycrystalline layer is formed by depositing a discrete amorphous silicon layer in a thickness not exceeding about 1000 angstroms on the first said insulating coating at a temperature in the range of about 550 to about 600°

C.,

heating this said amorphous silicon layer at a temperature of about 800°

C. to convert it to a polycrystalline seed layer, and epitaxially extending the crystal grains of said polycrystalline layer in a silicon forming ambient at a temperature in the range of about 650°

C. to about 700°

C. for a time sufficient to grow the desired thickness of the said first polycrystalline layer.

15. The method of claim 14 wherein said extended polycrystalline layer is doped with a conductivity type determining impurity.

16. The method of claim 14 including forming a third insulating coating on said second polycrystalline layer,

forming a via hole through said third insulating coating, to the second said polycrystalline layer, and

forming a conductive metal contact in said via opening.

17. The method of claim 14 wherein said second polycrystalline layer is doped.

18. The method of claim 14 wherein the first said insulating coating is a thermally grown silicon dioxide.

19. The method of claim 18 wherein at least one of said second and third insulating coatings comprises a chemically vapor deposited silicon dioxide.

20. The method of claim 19 wherein said second polycrystalline layer is doped.

21. The method of claim 18 wherein said second polycrystalline layer is doped.

26. The method of claim 5 wherein said grains of said sizes corresponding to the thickness of said second layer.

27. The method of claim 26 wherein said extended second polycrystalline layer is doped with a conductivity type determining impurity.

28. The method of claim 26 wherein said second polycrystalline layer is doped.

29. The method of claim 26 including forming a third insulating coating on said second polycrystalline layer,

forming a via hole through said third insulating coating, to the second said polycrystalline layer, and

forming a conductive metal contact in said via opening.

30. The method of claim 27 wherein said second polycrystalline layer is doped.

31. The method of claim 26 wherein the first said insulating coating is a thermally grown silicon dioxide.

32. The method of claim 31 wherein said second polycrystalline layer is doped.

33. The method of claim 31 wherein at least one of said second and third insulating coatings comprises a chemically vapor deposited silicon dioxide.

34. The method of claim 33 wherein said second polycrystalline layer is doped.

35. The method of claim 26 wherein the first polycrystalline layer is formed by depositing from a silicon forming gaseous phase a discrete amorphous silicon layer in a thickness not exceeding about 1000 angstroms on the first said insulating coating at a temperature in the range of about 550 to about 600°

C.,

heating this said amorphous silicon layer at a temperature of about 750°

C. to about 800°

C. to convert it to an equiaxial polycrystalline seed layer, and epitaxially extending the crystal grains of said polycrystalline layer in a silicon forming ambient at a temperature in the range of about 650°

C. to about 700°

C. for a time sufficient to grow the desired thickness of the said first polycrystalline layer.

36. The method of claim 35 wherein said extended first polycrystalline layer is doped with a conductivity type determining impurity.

37. The method of claim 35 including forming a third insulating coating on said second polycrystalline layer,

forming a via hole through said third insulating coating, to the second said polycrystalline layer, and

forming a conductive metal contact in said via opening.

38. The method of claim 35 wherein said second polycrystalline layer is doped.

39. The method of claim 35 wherein the first said insulating coating is a thermally grown silicon dioxide.

40. The method of claim 39 wherein at least one of said second and third insulating coatings comprises a chemically vapor deposited silicon dioxide.

41. The method of claim 40 wherein said second polycrystalline layer is doped.

42. The method of claim 39 wherein said second polycrystalline layer is doped.

43. The method of claim 35 wherein the said first layer grains have a size corresponding to the thickness of said first layer.