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Communications processor

  • US 4,363,094 A
  • Filed: 06/04/1980
  • Issued: 12/07/1982
  • Est. Priority Date: 12/29/1977
  • Status: Expired due to Term
First Claim
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1. An information transfer system for transferring information between a common location and a plurality of independently operating data processors over a bi-directional bus operated in a demand assigned mode, said information transfer system including:

  • an information storage and retrieval device and an arbitrator at said common location, said arbitrator coupling said bi-directional bus to said information storage and retrieval device,said arbitrator including means for generating a control signal after all said independently operating processors, collectively, either has had, refused or does not require access, and also including clock means for generating a cyclic timing signal having two distinct portions,a plurality of bus control means, each associated with a different one of said plurality of independently operating data processors, each said bus control means including a control signal input and a control signal output, each said bus control means enabling access to said bi-directional bus by the associated data processor only on receipt of said control signal or a replica thereof,a clock bus coupled to said clock means for distributing said timing signal to a plurality of said bus control means,control signal distributing means coupled to said means for generating a control signal for presenting said control signal to be effective at a control signal input of only one of said bus control means, and coupling a control signal output of each of a plurality of said bus control means to be effective at a control signal input of other of said bus control means,each of said bus control means responsive to the receipt of a control signal or replica thereof at said control signal input for immediately coupling a replica of said control signal to the associated control signal output in the event access to said bus is not required,or if access to said bus is required, allowing access to said bi-directional bus subsequent to receipt of said control signal or replica thereof and synchronous with said timing signal for one of said distinctive portions and simultaneously with the beginning of said one distinctive portion coupling a replica of said control signal to an associated control signal output.

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