Differential sample-and-hold circuit

• US 4,370,572 A
• Filed: 01/17/1980
• Issued: 01/25/1983
• Est. Priority Date: 01/17/1980
• Status: Expired due to Term

• Current Assignee: TRW Limited (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Original Assignee: TRW Limited (Zeppelin - Stiftung der Stadt Friedrichshafen)
• Inventors: Cosand, Albert E., de Graaf, Kenneth B.
• Primary Examiner(s): Zazworsky, John
• Application Number:
  US06/112,963
• Time in Patent Office: 1,104 Days
• Field of Search: 307/352, 307/353, 328/151
• US Class Current: 327/96
• CPC Class Codes: G11C 27/026 associated with an amplifier G11C27/028 takes precedence

Abstract

A high-speed sample-and-hold circuit well suited for fabrication in monolithic form, the circuit including a pair of capacitors used to track a differential analog signal, and at least two switches for connecting the analog signal to the capacitors in a tracking mode, and for isolating the capacitors from the analog signal in a hold mode. In a preferred embodiment of the invention, the switches are diodes and each capacitor is driven differentially through a separate pair of diodes, which are forward-biased in the tracking mode and reverse-biased in the hold mode. Additional circuitry is provided to compensate for variations in characteristics of the diodes due to temperature changes. Furthermore, the effects of capacitive coupling through the diodes in the hold mode are minimized by disconnecting the analog input signal and substituting a signal derived from the held signal stored in the capacitors.

Claims

1. A monolithic differential sample-and-hold circuit, comprising:

a preamplifier for processing an analog input signal and providing corresponding differential analog signals;

a first differential amplifier connected to receive the analog signals from said preamplifier to provide a first amplified differential analog signal;

a second differential amplifier also connected to receive the analog signals from said preamplifier, to provide a second amplified differential analog signal identical to said first amplified differential analog signal;

two capacitors, each having a grounded terminal and an ungrounded terminal;

a first pair of diodes having anode terminals connected to receive said first amplified differential analog signal, and cathode terminals each connected to said ungrounded terminal of a different one of said capacitors;

a second pair of diodes having cathode terminals connected to receive said second differential analog signal and anode terminals connected to corresponding cathode terminals of said first pair of diodes;

a post-amplifier having differential inputs connected to said ungrounded terminals of said capacitors; and

a bias signal source connectable to said first and second pairs of diodes to provide forward bias in response to a tracking-mode signal and reverse bias in response to a hold-mode signal;

whereby said first and second pairs of diodes are forward-biased in response to the tracking-mode signal, to allow said first and second amplified differential analog signals to be coupled through said first and second pairs of diodes to said capacitors, and are reverse-biased in response to the hold-mode signal, to isolate said capacitors from said analog signals.

2. A monolithic differential sample-and-hold circuit as set forth in claim 1, and further including:

means, also responsive to the hold-mode signal, for disconnecting the differential analog signals from said first and second differential amplifiers, and substituting a held analog signal derived from said capacitors, whereby the effects of any coupling through said diodes when in the hold mode are minimized by the substitution of a held signal independent of the analog input signals.

3. A monolithic differential sample-and-hold circuit as set forth in claim 1, wherein:

said first and second amplified differential analog signals are current signals that are converted to voltage signals by resistors in the tracking mode, and are thereby coupled to said capacitors.

4. A monolithic differential sample-and-hold circuit comprising:

a preamplifier for processing an analog input signal and providing corresponding differential analog signals;

a first differential amplifier connected to receive the analog signals from said preamplifier to provide a first amplified differential analog signal;

a second differential amplifier also connected to receive the analog signals from said preamplifier, to provide a second amplified differential analog signal identical to said first amplified differential analog signal;

two capacitors, each having a grounded terminal and an ungrounded terminal;

a first pair of diodes having anode terminals connected to receive said first amplified differential analog signal, and cathode terminals each connected to said ungrounded terminal of a different one of said capacitors;

a second pair of diodes having cathode terminals connected to receive said second differential analog signal and anode terminals connected to corresponding cathode terminals of said first pair of diodes;

a post-amplifier having differential inputs connected to said ungrounded terminals of said capacitors; and

a bias signal source connectable to said first and second pairs of diodes to provide forward bias in response to a tracking-mode signal and reverse bias in response to a hold-mode signal;

said bias signal source including means for maintaining a constant forward-bias current through said diodes when in the tracking mode, in spite of variations in diode characteristics due to temperature changes

whereby said first and second pairs of diodes are forward-biased in response to the tracking-mode signal, to allow said first and second amplified differential analog signals to be coupled through said first and second pairs of diodes to said capacitors, and are reverse-biased in response to the hold-mode signal, to isolate said capacitors from said analog signals.

5. A monolithic differential sample-and-hold circuit as set forth in claim 4, wherein:

said circuit further includes a first pair of load resistors providing a path to ground from the anodes of said first pair of diodes, and a second pair of load resistors providing a path to ground from the cathodes of said second pair of diodes;

said means for maintaining a constant forward-bias current includes constant current generation means connectable in the tracking mode to draw a constant total current through said diodes and said second pair of resistors, and further includes an additional pair of diodes connected in series between ground and said second pair of load resistors, whereby said additional pair of diodes duplicates the impedance characteristics of each series-connected pair of said first and second pairs of diodes and thereby maintains a constant current ratio between the current in one series-connected pair of diodes and a corresponding one of said second pair of load resistors, and thereby also maintains a constant current through each series-connected pair of diodes.

6. A differential sample-and-hold circuit comprising:

input amplifier means providing a differential analog signal;

capacitor means;

switching means for selectively coupling the differential analog signal to said capacitor means; and

output amplifier means having differential inputs supplied from said capacitor means, to provide a sampled analog output signal;

and wherein

said capacitor means includes two capacitors, each connected between a common point and one of the differential inputs of said output amplifier means,

said switching means includes two pairs of diodes, means for forward-biasing said diodes to provide a tracking mode of operation, in which the differential analog signal is coupled to said capacitors, and means for reverse-biasing said diodes to provide a hold mode of operation, in which said capacitors are electrically isolated from the differential analog signal and provide inputs representative of a sampled analog signal to said output amplifier means, and

said input amplifier means includes a preamplifier providing a differential analog signal, and two differential amplifiers, each having inputs supplied by said preamplifier, and each supplying a differential pair of outputs to a different one of said pairs of diodes.

7. A differential sample-and-hold circuit, comprising:

input amplifier means providing a differential analog signal;

capacitor means;

switching means for selectively coupling the differential analog signal to said capacitor means; and

output amplifier means having differential inputs supplied from said capacitor means, to provide a sampled analog output signal;

and wherein

said capacitor means includes two capacitors, each connected between a common point and one of the differential inputs of said output amplifier means,

said switching means includes at least one pair of diodes, means for forward-biasing said diodes to provide a tracking mode of operation, in which the differential analog signal is coupled to said capacitors, and means for reverse-biasing said diodes to provide a hold mode of operation, in which said capacitors are electrically isolated from the differential analog signal and provide inputs representative of a sampled analog signal to said output amplifier means, and

said switching means further includes means operative only in the hold mode, for disconnecting the differential analog signal and substituting a signal derived from said capacitors, to minimize the effect of coupling through said diodes when in the hold mode, the substituted signal being independent of the differential analog signal.

8. A differential sample-and-hold circuit, comprising:

input amplifier means providing a differential analog signal;

capacitor means;

switching means for selectively coupling the differential analog signal to said capacitor means; and

output amplifier means having differential inputs supplied from said capacitor means, to provide a sampled analog output signal;

and wherein

said capacitor means includes two capacitors, each connected between a common point and one of the differential inputs of said output amplifier means, and

said switching means includes at least one pair of diodes, means for compensating for changes in conduction characteristics of said diodes due to temperature, means for forward-biasing said diodes to provide a tracking mode of operation, in which the differential analog signal is coupled to said capacitors, and means for reverse-biasing said diodes to provide a hold mode of operation, in which said capacitors are electrically isolated from the differential analog signal and provide inputs representative of a sampled analog signal to said output amplifier means.