IMD Limiter

• US 4,370,622 A
• Filed: 03/23/1981
• Issued: 01/25/1983
• Est. Priority Date: 03/23/1981
• Status: Expired due to Term

• Current Assignee: Rockwell International Corporation
• Original Assignee: Rockwell International Corporation
• Inventors: Thornton, Jack C., Hornbeck, Sherman J.
• Primary Examiner(s): NG, JIN FAY
• Application Number:
  US06/246,455
• Time in Patent Office: 673 Days
• Field of Search: 455/116, 455/117, 455/126, 330/207 P, 330/298
• US Class Current: 330/207.00P
• CPC Class Codes: H03F 1/34 Negative-feedback-circuit arrangements with or without positive feedback H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence ; for rejection of common mode signals H03F3/45479
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03G 3/3042 in modulators, frequency-changers, transmitters or power amplifiers transmission power control in bidirectional transmission systems H04W52/04
• CPC Class Codes: H04B 2001/0433 with linearisation using feedback

Abstract

An intermodulation distortion limiter controls the ratio of average power to peak envelope power in the output of a linear power amplifier and this protects against excess non-linearity by reducing the drive power when the ratio exceeds a similar ratio associated with the incoming RF signal.

Claims

1. An intermodulation distortion limiter for controlling the ratio of average power to peak envelope power in an output signal from a power amplifier comprising:

control means, responsive to a control signal, for controlling the amplitude of an input signal applied to the power amplifier, the input signal having associated therewith, when applied to the power amplifier, an average power and a peak envelope power;

first detector circuit means for detecting the difference between the peak envelope power and the average power of the input signal to provide a first reference signal thereby;

selectable reference source for providing first and second selectable reference signals;

reference generator means for generating a second reference signal that is responsive to the first reference signal and the first selectable reference signal;

second detector circuit means for comparing the peak envelope power of the output signal and the second selectable reference signal to obtain a first analog representation of the peak envelope power difference thereby;

third detector circuit means for detecting the difference between the average power of the output signal and the second reference signal to obtain a second analog representation of the average power difference; and

combination means for combining the first and second analog representations to obtain the control signal to which the control means is responsive.

2. The intermodulation distortion limiter according to claim 1 wherein the first detector circuit means comprises:

input power detector means for detecting a first signal that represents the input forward power applied to the power amplifier;

an input peak envelope power circuit means for obtaining a second signal that represents the difference between the peak envelope power of the first signal and a reference potential;

an average power sensing circuit means for integrating over time the difference between the first signal and reference potential to obtain a third signal thereby; and

a difference amplifier means for obtaining the difference between the second and the third signals to provide the first reference signal.

3. The intermodulation distortion limiter according to claim 1 wherein the reference generator means, comprises:

a comparator means for obtaining the difference between the first reference signal and the first selectable reference signal to obtain the second reference signal thereby.

4. The intermodulation distortion limiter according to claim 1 wherein the second detector means comprises:

detector means for detecting a fourth signal that represents the output forward power of the power amplifier; and

comparator means for obtaining the difference between the second selectable reference signal and the fourth signal to obtain the first analog representation.

5. The intermodulation distortion limiter according to claim 1 wherein the third detector circuit means comprises:

detector means for detecting a fourth signal that represents the output forward power of the power amplifier; and

integrator means for integrating over time the difference between the fourth signal and the second reference signal to obtain the second analog representation.

6. The intermodulation distortion limiter according to claim 1 or 5 wherein the reference generator means further comprising:

protection circuit means for protecting the power amplifier.

7. The intermodulation distortion limiter according to claim 6 wherein the protection circuit means comprises;

means for generating a third selectable reference signal; and

precision diode means for preventing the second reference signal from exceeding the third selectable reference signal.

8. A method of controlling the ratio of average power to peak envelope in an output signal from a power amplifier, comprising:

controlling the amplitude of an input signal applied to the power amplifier in response to a control signal, the input signal having associated therewith, when applied to the power amplifier, an average power and a peak envelope power;

detecting the difference between the peak envelope power and the average power of the input signal to provide a first reference signal;

providing a first and second selectable reference signal;

generating a second reference signal that is in response to the first reference signal and the first selectable reference signal;

detecting the difference between the peak envelope power of the output signal and the second selectable reference signal to obtain a first analog representation of the peak envelope power difference;

detecting the difference between the average power of the output signal and the second reference signal to obtain a second analog representation of the average power difference; and

combining the first and second analog representations to obtain the control signal.

9. The method according to claim 8 wherein the step of detecting the difference between the peak envelope power and the average power to provide a first reference signal, comprises:

detecting a first signal that represents the input forward power to the applied power amplifier;

obtaining a second signal that represents the difference between the peak envelope power of the first signal and a reference potential;

integrating over time of the difference between the first signal and a reference potential to obtain a third signal thereby; and

obtaining the difference between the second signal and the third signal to provide the first reference signal.

10. The step according to claim 8 wherein the step of generating a second reference signal, comprises:

obtaining the difference between the first reference signal and the first selectable reference signal to obtain the second reference signal thereby.

11. The method according to claim 8 wherein the step of detecting the difference between the peak envelop power of the output signal and the first selectable reference signal, comprises:

detecting a fourth signal that represents the output forward power of the power amplifier; and

obtaining the difference between the second selectable reference signal and the fourth signal to obtain the first analog representation.

12. The method according to claim 8 wherein the step of detecting the difference between the average power of the output signal and the second reference signal to obtain the analog representation of the average power difference, comprises:

detecting a fourth signal that represents the output forward power of the power amplifier; and

integrating over time the difference between the first signal and the second reference signal to obtain the second analog representation.

13. The method according to claim 8 or 12 wherein the step of generating a second reference signal comprises the step of:

protecting the power amplifier.

14. The method according to claim 13 wherein the step of protecting the power amplifier comprises:

generating a third selectable reference signal; and

preventing a second reference signal from exceeding the third selectable reference signal.