Polyfunction programmable data receiver

• US 4,380,762 A
• Filed: 02/20/1981
• Issued: 04/19/1983
• Est. Priority Date: 01/31/1980
• Status: Expired due to Fees

• Current Assignee: Gaetano Capasso
• Original Assignee: Gaetano Capasso
• Inventors: Capasso, Gaetano
• Primary Examiner(s): Waring, Alvin H.
• Application Number:
  US06/236,367
• Time in Patent Office: 788 Days
• Field of Search: 340/825, 340/825.3, 340/825.57, 340/825.62, 340/825.63, 340/825.65, 340/825.69
• US Class Current: 340/12.16
• CPC Class Codes: G08C 19/28 using pulse code
• CPC Class Codes: G08G 1/081 Plural intersections under common control

Abstract

A polyfunction programmable data receiver comprising means for receiving a string of serial data followed by a control signal; means for detecting said signal comprising a pulse length analyzer, and a counter and a comparator; bidirectional means for setting up a digital word to be identified or for providing in parallel the data of said string according to the status of a mode selection circuit; means for providing an output signal if the comparison between said serial string and said set up digital word is favorable when the receiver operates as identifier, or an enabling signal when the receiver operates as a series/parallel converter. Some applications of this circuit are also disclosed.

Claims

1. A programmable polyfunction data receiver comprising means for receiving a sequence of serial data signals followed by a control signal;

pulse length analyzer means for detecting said signals;

mode selection circuit means for controlling operation of said receiver in an input data validation mode or in a serial/parallel data conversion mode;

bidirectional bus means for setting up a digital word to be identified or for providing in parallel the data of said sequence according to the state of said mode selection circuit;

means for providing an output signal if the comparison validates said serial sequence and said set up digital word when the receiver operates as identifier, and for providing an enabling signal when the receiver operates as a series/parallel converter.

2. A data receiver according to claim 1, wherein, in said detection means for the data of the input serial sequence when the receiver operates in said comparison mode comprises a counter controlled by an oscillator located internally of the receiver.

3. A data receiver according to claim 1, wherein for operation of the receiver as a parallel converter of a serial digital sequence shift register means driven by said pulse length detector stores said serial digital sequence;

and wherein the output of said shift register is connected to said bidirectional bus.

4. A data receiver according to claims 1 or 2, comprising means for detecting the duration of said control signal during the operation in the comparison mode and for inputting or not inputting into latch means the pulse length analyzer output according to the duration of said control signal.

5. A data receiver according to claim 2, comprising means for restoration of the waveform and phase of the serial data sequence operating under the control of said internal oscillator.

6. An intercom system having a single wire for the control of a utilizer call, comprising a circuit according to claim 1 associated with each intercom unit, each intercom unit being identified by means of a different digital word set up on said bidirectional bus.

7. A system according to claim 6 characterized in that additional receivers on single wire are arranged for controlling auxiliary functions such as lights, locks and the like.

8. A system according to claims 6 or 7 characterized in that the favorable comparison output of said receiver may be connected to a loudspeaker and pulsed so that it operates as an acoustical ringer.

9. A data receiver according to claim 1, wherein said pulse length analyzer means includes pulse counter means having outputs connected to respective digital comparators, and logic gate means connecting outputs of the digital comparators to respective outputs of said pulse length analyzer means.