Cable checker utilizing logic circuitry

• US 4,385,272 A
• Filed: 12/24/1980
• Issued: 05/24/1983
• Est. Priority Date: 12/24/1980
• Status: Expired due to Fees

• Current Assignee: Gary J. Whitehead
• Original Assignee: Gary J. Whitehead
• Inventors: Whitehead, Gary J.
• Primary Examiner(s): Krawczewicz, Stanley T.
• Application Number:
  US06/220,256
• Time in Patent Office: 881 Days
• Field of Search: 324/51, 324/73 R, 324/53, 340/652, 340/650
• US Class Current: 324/542
• CPC Class Codes: G01R 31/58 Testing of lines, cables or conductors testing of electric windings G01R31/72

Abstract

A cable checker employs a pair of jacks mounted to a housing and operably associated with an electronic circuit employing a pair of digital logic integrated circuits for both the confirmation and clocking circuitry. In this respect, the integrated circuits comprise a plurality of NAND gates which drive a pair of light emitting diodes, one of which is red to indicate an improperly functioning cable and the other one of which is green to indicate a properly functioning cable. The cable checker further includes an astable multivibrator circuit so as to cause the light emitting diodes to blink thus to save battery power, and the checking of a cable is accomplished simply by plugging the two ends of the cable into the respective jacks associated with the cable checker.

Claims

1. For use with an electric cable having opposite end connectors and a pair of conductors therein adapted to be coupled by said connectors to circuits, an apparatus for testing said cable, comprising a source of voltage, circuit coupling means engageable with said connectors for establishing separate conducting paths through the pair of conductors respectively to the source and to ground, logic circuit means connected to the circuit coupling means for continuously monitoring the current conducted through said pair of conductors in response to engagement of the connectors with the circuit coupling means, said logic circuit means including means for detecting abnormal current conducting patterns representing a plurality of defects in the cable, and indicator means connected to the logic circuit means for registering detection of any of the cable defects by the detecting means on a real time basis.

2. The apparatus as defined in claim 1 wherein said indicator means comprises a pair of visually distinguishable lamps respectively signifying the existence of at least one of the cable defects and the absence of any defects.

3. The apparatus as defined in claim 2 wherein the circuit coupling means comprises a pair of jack devices respectively connected to the source and to ground.

4. The apparatus as defined in claim 3 wherein the detecting means includes a gate section monitoring conductivity of said pair of conductors and shorting between said conductors, and a display control section connected to the gate section for alternately driving said pair of indicator lamps.

5. The apparatus as defined in claim 4 wherein said plurality of defects monitored number fourteen.

6. The apparatus as defined in claim 2 wherein the detecting means includes a gate section monitoring conductivity of said pair of conductors and shorting between said conductors, and a display control section connected to the gate section for alternately driving said pair of indicator lamps.

7. The apparatus as defined in claim 1 wherein the circuit coupling means comprises a pair of jack devices respectively connected to the source and to ground.

8. The apparatus as defined in claim 1 wherein said plurality of defects monitoring number fourteen.

9. The apparatus as defined in claim 1 wherein said detecting means includes a short detecting gate having a pair of inputs, a conductivity detecting gate having a pair of inputs, means for conducting current in one of the conductors in parallel to one of the inputs of both of the gates and conducting current in the other of the conductors only to the other of the inputs of the short detecting gate, and display controlling means connected to said gates for comparing the outputs thereof.