Selective call communication receiver

• US 4,385,398 A
• Filed: 06/07/1979
• Issued: 05/24/1983
• Est. Priority Date: 06/07/1979
• Status: Expired due to Term

• Current Assignee: Keith H. Wycoff
• Original Assignee: Keith H. Wycoff
• Inventors: Dittmer, William H., Wycoff, Keith H.
• Primary Examiner(s): Bookbinder, Marc E.
• Application Number:
  US06/046,510
• Time in Patent Office: 1,447 Days
• Field of Search: 455/221, 455/227, 455/228, 455/229, 455/31, 455/35, 455/36, 455/37, 455/38, 455/343, 340/311.1, 340/825.48, 340/825.71, 340/825.72, 340/825.73
• US Class Current: 340/7.49
• CPC Class Codes: H03G 3/005 Control by a pilot signal H03G3/001 takes precedence
• CPC Class Codes: H04W 88/027 using frequency address codes
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A decoder circuit responds to a given code to provide an enabling signal for rendering an audio circuit operative. A push-button switch actuatable to monitor the channel is associated with timer and electronic switch.

One connection places the receiver in either a monitor mode or a tone-squelch mode. A second connection places the receiver in condition to be unsquelched manually or by the carrier wave or by the proper code. The battery saver provides a continuous supply voltage during the first tone, the entirety of the code and for a time thereafter. The rate of the pulsed supply voltage produced after such time will be increased. Alternately, the receiver can be placed in the carrier-squelch mode. The receiver can be reset to the code-squelch mode and cause the pulsed supply voltage to revert to its usual rate. After the start of detection, pulses render ensuing circuitry nonresponsive to glitches.

A tone signal of at least a predetermined duration produces an enabling signal commencing with the termination of the first tone. There is produced an alerting tone having characteristics corresponding to the duration of the second tone. In the absence of a control signal, the output of a gate that feeds the audio circuit floats so as not to be a load. A long first tone enables all receivers in the group. A multiple tone receiver is readily connected to a single tone receiver. The timing functions in the receiver are performed by the resettable divide-by-two circuits.

Claims

1. In a selective call communication receiver adapted to respond to at least one code tone selected from a plurality of code tones of different frequencies, the combination comprising filter means responsive to a code tone of predetermined frequency to provide a sinusoidal wave, means for converting the sinusoidal wave into a train of tone pulses, and circuit means responsive to the first of the tone pulses exceeding a predetermined duration to provide an output signal, the output signal commencing during the first of the tone pulses, the predetermined duration being substantially the same for all of the different frequencies, said circuit means having only on and off conditions, the output signal being produced when said circuit means is in one of the conditions.

2. In the communication receiver of claim 1, wherein said filter means is supplied with pulsed power.

3. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by at least a set of code tones and adapted to detect the code tones and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the one detected code tone, duration-detector means coupled to said decoder means and responsive to the control signal for providing output signals representative of the duration of the one detected code tone, clock means for producing a clock signal at an audio frequency, and control means coupled to said duration-detector means and to said clock means for producing one of two or more alerting tones having characteristics and durations corresponding to the detected signals, the alerting tones being coupled to the transducer.

4. In the selective call communication receiver of claim 3, wherein said decoder means is responsive to a sequence of two detected code tones.

5. In the selective call communication receiver of claim 3, wherein said decoder means includes first and second frequency discriminators, said first frequency discriminator being responsive to a first detected code tone of a predetermined frequency and said second frequency discriminator being responsive to a second detected code tone of a different predetermined frequency.

6. In the selective call communication receiver of claim 3, wherein said decoder includes frequency discriminator means for producing the discriminator signal in the form of a sequence of pulses persisting for the duration of the one detected code tone, and envelope detector means coupled to said frequency-discriminator means and responsive to the discriminator signal to provide a control signal persisting for a duration related to the duration of the discriminator signal.

7. In the selective call communication receiver of claim 6, wherein the control signal persists for a duration at least 6-8 milliseconds longer than the duration of the one detected code tone.

8. In the selective call communication receiver of claim 3, wherein said decoder means is responsive to a sequence of code tones and the one detected code tone is the last code tone in the sequence of detected code tones.

9. In the selective call communication receiver of claim 3, wherein said decoder means is responsive to a sequence of two detected code tones and said one code tone is the second detected code tone in said sequence.

10. In the selective call communication receiver of claim 6, wherein said duration-detector means includes a clock, and a divider circuit having a signal input coupled to said clock and a reset input coupled to said frequency-discriminator means and a plurality of outputs, said divider circuit being operable to divide the signal from said clock by a plurality of predetermined divisors, said divider circuit being operable for the duration of the discriminator signal.

11. In the selective call communication receiver of claim 3, wherein said decoder means responds to a sequence of code tones and provides a control signal for a duration related to the duration of the last detected code tone in the sequence thereof, said alerting tones having either a fixed duration or a duration terminating with the termination of the last detected code tone.

12. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by at least a set of code tones and adapted to detect the code tones and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the at least one of the detected code tones duration-detector means coupled to said decoder means and responsive to the control signal for providing output signals representative of the duration of the one code tone, latch means coupled to said duration-detector means and being set by the output signals into one of a plurality of modes, reset means for resetting said latch means a predetermined time after setting thereof, clock means for producing a clock signalat an audio frequency, logic means coupled to said latch means and to said clock means and having first and second outputs, and being responsive to the plurality of modes respectively to produce on said first output operating signals of various durations and respectively to produce on said second output alerting tones having various characteristics, and gate means having an output coupled to the transducer and having first and second inputs respectively coupled to the first and second outputs of said logic means, said gate means being operative for the duration of the operating signal on the first input thereof to couple to the transducer and alerting tone on the second input thereof.

13. In the selective call communication receiver of claim 12, wherein said latch means includes a plurality of individual latches which are individually set and simultaneously reset, said plurality of modes corresponding to the conditions of said latch means.

14. In the selective call communication receiver of claim 12, wherein said latch means has a reset input and two signal outputs, said reset means having an output coupled to said reset input means for resetting thereof and having two inputs respectively coupled to the signal outputs of said latch means, thereby resetting said latch means at two different predetermined times after setting thereof respectively in accordance with the mode of said latch means.

15. In the selective call communication receiver of claim 12, wherein said reset means includes a clock, and a divider circuit having a signal input coupled to said clock and a reset input coupled to said latch means and operable to divide the signal from said clock by a predetermined divisor.

16. In the selective call communication receiver of claim 12, wherein said reset means includes a clock, and a divider circuit having a signal input coupled to said clock and two reset inputs both coupled to said latch means and operable to divide a signal from said clock respectively by two predetermined divisors.

17. In the selective call communication receiver of claim 12, wherein said reset means has a control output for producing a pulsating signal thereat, said logic means being coupled to said control output and being operative when said latch means is in one of said modes to produce an interrupted alerting tone, the frequency of the pulsating signal on said output being several orders of magnitude less than the pulsating signal from said clock means.

18. In the selective call communication receiver of claim 12, wherein the operating signal persists either for a fixed predetermined duration or for a duration terminating with the end of the one detected code tone.

19. In the selective call communication receiver of claim 12, wherein at least one of the alerting tones is continuous and at least one of the alerting tones is interrupted.

20. In the selective call communication receiver of claim 12, wherein the output of said gate means floats in the absence of the operating signal and fluctuates between high and low states in accordance with the alerting tone during the presence of the operating signal.

21. In the selective call communication receiver of claim 12 and further comprising a manually operable switch coupled to said reset means manually to reset said latch means prior to the end of the predetermined time.

22. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by at least a set of code tones and adapted to detect the code tones and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, an audio circuit operative in the presence of an enabling signal for the duration thereof to process electrical signals in the audio frequency range and couple them to the transducer, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the one detected code tone, duration-detector means coupled to said decoder means and responsive to the control signal for providing output signals representative of the duration of the one detected code tone, latch means coupled to said duration-detector means and being set by the output signals thereon into one of a plurality of modes, said latch means being responsive to output signals produced as the result of any of the possible durations of the one detected code tone to produce an enabling signal for the audio circuit, reset means for resetting said latch means a predetermined time after setting thereof thereby terminating the enabling signal a predetermined time after said latch means had been set, clock means for producing a clock signal at an audio frequency, and logic means coupled to said latch means and to said clock means for producing one of several alerting tones having characteristics and durations corresponding to the modes of said latch means, the alerting tone being coupled to the audio circuit.

23. In the selective call communication receiver of claim 22, wherein said latch means has a reset input and two signal outputs, said reset means having an output coupled to said reset input and having two inputs respectively coupled to the signal output of said latch means, thereby resetting said latch means and terminating the enabling signal at two different predetermined times after setting thereof respectively in accordance with the mode of said latch means.

24. In the selective call communication receiver of claim 22, and further comprising a manually operable switch, OR gate means having a first input coupled to said latch means and a second input coupled to said manually operable switch, and an output coupled to the audio circuit, whereby the audio circuit is rendered operative by an enabling signal from said latch means or by actuation of said manually operable switch.

25. In the selective call communication receiver of claim 22 and further comprising a manually operable switch adapted to be manually operated to hold the audio circuit operative beyond termination of the enabling signal.

26. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a set of code tones followed by intelligence signals and adapted to detect the code tones and the intelligence signals and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, an audio circuit operative in the presence of an enabling signal substantially for the duration thereof to process electrical signals in the audio frequency range and couple them to the transducer, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the at least one detected code tone, duration-detector means coupled to said decoder means and responsive to the control signal for providing output signals representative of the duration of the at least one code tone, latch means coupled to said duration-detector means and being selectively set by the output signals thereon into a tone-and-voice mode or at least one tone-only mode, said latch means being responsive to output signals produced as the result of any of the possible durations of the at least one detected code tone to produce an enabling signal for the audio circuit, reset means for resetting said latch means and terminating the enabling signal a predetermined time after completion of setting said latch means, and clock means for producing a clock signal at an audio frequency, logic means coupled to said latch means and to said clock means, said logic means producing an alerting tone lasting for less than three seconds when said latch means is in the tone-and-voice mode, the alerting tone being coupled to the audio circuit for coupling thereof to the transducer followed substantially immediately by the intelligence signals, said logic means further producing at least one alerting tone having characteristics corresponding to the tone-only mode of said latch means, the at least one alerting tone being coupled to the audio circuit for coupling thereof to the transducer.

27. In the selective call communication receiver of claim 26, wherein the at least one alerting tone lasts for a period dependent on the duration of the at least one detected code tone when said latch means is in the tone-and-voice mode.

28. In the communication receiver of claim 26, wherein said latch means is selectively set in at least two tone-only modes, said logic means producing one of two alerting tones having characteristics corresponding to the two tone-only modes of said latch means.

29. In the selective call communication receiver of claim 28, wherein said logic means produces two further alerting tones lasting for the same predetermined duration, one being continuous and one being interrupted.

30. In the selective call communication receiver of claim 28, wherein said predetermined duration is for about four seconds.

31. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by at least a set of code tones and adapted to detect the code tones and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the one detected code tone, duration-detector means coupled to said decoder means and having a plurality of outputs corresponding in number to the number of possible durations of the one code tone, said duration-detector means being responsive to the control signal of shortest duration to produce an output signal on one of said outputs and being responsive to a control signal of next longer duration to produce output signals on two of said outputs and so forth to the longest of the control signal which produces output signals on all of said outputs, a plurality of latches corresponding in number to the number of possible durations of the detected code tone and being respectively coupled to the outputs of said duration-detector means and being respectively set when output signals are respectively applied thereto, reset means for resetting all of said latches simultaneously a predetermined time after setting thereof, clock means for producing a clock signal at an audio frequency, and logic means coupled to said plurality of latches and to said clock means for producing one of several alerting tones having characteristics and durations corresponding to the conditions of said latch means, the alerting tone being coupled to the transducer.

32. In the selective call communication receiver of claim 31, wherein said duration-detector means has first and second and third outputs, said duration-detector means producing an output signal on said first output when the duration of the one detected code tone exceeds about 31 milliseconds and producing output signals on said first and second outputs when the duration of the one detected code tone exceeds about 125 milliseconds and producing output signals on all three outputs when the duration of the one detected code tone exceeds about 250 milliseconds.

33. In the selective call communication receiver of claim 31, wherein said duration-detector means has three outputs, there being three latches respectively coupled to said outputs.

34. In the selective call communication receiver of claim 31, wherein said reset means includes a clock, and a divider circuit having a signal input coupled to said clock and a reset input coupled to said latch means and operable to divide the signal from said clock by a predetermined divisor.

35. In the selective call communication receiver of claim 34, wherein said divider circuit has three outputs respectively set about two seconds, four seconds and eight seconds after said latches have been set, said reset means further including means to combine the signals from said first and third outputs to provide a reset signal commencing about ten seconds after said latches have been set.

36. In the selective call communication receiver of claim 31, wherein said logic means includes logic devices coupled to said decoder means to be sure that the alerting tone is coupled to the transducer during the one detected code tone.

37. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a set of code tones followed by intelligence signals and adapted to detect the code tones and the intelligence signals and separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio frequency range into audible sounds, an audio circuit operative in the presence of an enabling signal substantially for the duration thereof to process electrical signals in the audio frequency range and couple them to the transducer, the combination comprising decoder means coupled to the processor circuit and being responsive to a set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the one detected code tone, duration-detector means coupled to said decoder means and having a plurality of outputs corresponding in number to the number of possible durations of the one code tone, said duration-detector means being responsive to the control signal of shortest duration to produce an output signal on one of said outputs and being responsive to a control signal of next longer duration to produce output signals on two of said outputs and so forth to the longest of the control signals which produces output signals on all of said outputs, a plurality of latches corresponding in number to the number of possible durations of the code tone and being respectively coupled to the output of said duration-detector means and being respectively set when output signals are respectively applied thereto, reset means for resetting all of said latches simultaneously a predetermined time after setting thereof, clock means for producing a clock signal at an audio frequency, and logic means coupled to said plurality of latches and to said clock means, said logic means producing an alerting tone lasting for less than three seconds when the output signal appears on only one of the outputs of said duration-detector means, the alerting tone being coupled to the audio circuit for coupling thereof to the transducer followed substantially immediately by the intelligence signals, said logic means producing one of several further alerting tones having characteristics and durations corresponding to the number of said latches which have been set, the one of the several further alerting tones being coupled to the audio circuit for coupling thereof to the transducer.

38. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code followed by intelligence signals and adapted to separate the code and the intelligence signals from the carrier wave, an audio circuit having a first input coupled to the processor and a second input and an output and being adapted to process electrical signals in the audio-frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals in the audio-frequency range into audible sounds, the combination comprising clock means for producing a clock signal at an audio frequency, means having an input coupled to the processor and an input coupled to said clock means and two outputs and being responsive to a predetermined code for producing an operating signal on one of said outputs and an alerting tone on the other of said outputs, and gate means having an output coupled to the audio circuit and having first and second inputs coupled respectively to said first and second outputs, the output of said gate means floating in the absence of an operating signal on the first input thereof to unload the audio circuit during the presence of the intelligence signals, said gate means being operative for the duration of the operating signal on the first input thereof to couple to the transducer the alerting tone on the second input thereof.

39. In the selective call communication receiver of claim 38, wherein said gate means includes a pair of serially connected FETs.

40. In the selective call communication receiver of claim 38, wherein said gate means includes a P-channel FET and an N-channel FET each having a gate and a source and a drain, said gates respectively constituting the first and second inputs of said gate means, said drains being connected together and defining the output of said gate means, the sources being respectively coupled to positive and negative supply voltages.

41. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a set of code tones followed by intelligence signals and adapted to detect the code tones and the intelligence signals and to separate them from the carrier wave, at least one of the detected code tones having one of a plurality of possible durations, a transducer for converting electrical signals in the audio-frequency range into audible sounds, an audio circuit operative in the presence of an enabling signal substantially for the duration thereof to process electrical signals in the audio-frequency range and couple them to the transducer, the combination comprising decoder means coupled to the processor circuit and being responsive to the set of detected code tones respectively of predetermined frequency to provide a control signal for a duration related to the duration of the one detected code tone, duration-detector means coupled to said decoder means and responsive to the control signal for providing output signals representative of the duration of the one detected code tone, latch means coupled to said duration-detector means and being set by the output signals thereon into one of a plurality of modes, reset means for resetting said latch means a predetermined time after setting thereof, clock means for producing a clock signal at an audio frequency, logic means coupled to said latch means and to said clock means and having first and second outputs, and being responsive to the plurality of modes respectively to produce on said first output operating signals of various durations and respectively to produce on said second output alerting tones having various characteristics, and gate means having an output coupled to the audio circuit and having first and second inputs respectively coupled to the first and second outputs of said logic means, the output of said gate means floating in the absence of an operating signal on the first input thereof to unload the audio circuit during the presence of intelligence signals, said gate means being operative for the duration of the operating signal on the first input thereof to couple to the transducer the alerting tone on the second input thereof.

42. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a sequence of code tones of various durations and adapted to detect the code tones and separate them from the carrier wave, a transducer for converting electrical signals in the audio frequency range into audible sounds, the combination comprising decoder means respectively having a plurality of decoder outputs corresponding to the number of code tones in the sequence and having an input coupled to the processor circuit, said decoder means being responsive to the first code tone in the sequence being of predetermined frequency to provide a first control signal on a first of said decoder outputs for a duration related to the duration of the first detected code tone, said decoder means being responsive to the last detected code tone in the sequence being of predetermined frequency to provide a last control signal on a last of said decoder outputs for a duration related to the duration of the last detected code tone, first duration-detector means having an input coupled to said first decoder output and having at least a pair of first decoder outputs, said first duration-detector means being responsive to a first control signal of shortest duration to produce an output signal on one of said first detector outputs and being responsive to a first control signal of longer duration to produce an output signal on the other of said first detector outputs, said one first detector output being coupled to said decoder means for rendering same operative to respond to the second detected code tone in the sequence, second duration-detector means having an input coupled to said last decoder output and having at least a pair of second detector outputs, said second duration-detector means being responsive to a last control signal of shortest duration to produce a detected signal on one of said second detector outputs and being responsive to a second control signal of longer duration to produce an output signal on the other of said second detector outputs, clock means for producing a clock signal at an audio frequency, and control means coupled to both of said duration-detector means and to said clock means for producing an alerting tone having certain characteristics when output signals appear on either of said other detector outputs and for producing an alerting tone having different characteristics when an output signal appears on said one second detector output, the alerting tone being coupled to the transducer.

43. In the selective call communication receiver of claim 42, wherein the carrier wave applied to the processor circuit is modulated by a sequence of first and second code tones, said decoder means including first and second channels each having an output, said first channel being respectively responsive to the first code tone and said second channel being responsive to the last code tone, said one first detector output being coupled to said second channel for rendering same operative to respond to the second code tone.

44. In the selective call communication receiver of claim 42, wherein an output signal will be produced on said other first detector output only when the duration of the first code is many times greater than the duration of such first code tone to produce a detected signal on said one first detector output.

45. In the selective call communication receiver of claim 42, wherein said first duration-detector means is responsive to a first control signal of at least 62 milliseconds in duration to produce an output signal on said one first detector output and is responsive to a first output signal persisting for at least about 2.5 seconds to produce a detected signal on said other first detector output.

46. In the selective call communication receiver of claim 42, wherein said first duration-detector means has a control input selectively coupled to an enabling voltage or a disabling voltage and having a further output, said first duration-detector means being operative to produce an output signal on said further output when an enabling voltage is applied to the control input and the first code tone has at least predetermined duration, said control means being coupled to said further output and being responsive to an output signal thereon to produce an alerting tone having said certain characteristics.

47. In the selective call communication receiver of claim 46, wherein the duration of the first detected code tone to produce an output signal on said further output is greater than the duration necessary to produce an output signal on said one first detector output but less than the duration necessary to produce an output signal on said other first detector output.

48. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a sequence of code tones of various durations and adapted to detect the code tones and separate them from the carrier wave, a transducer for converting electrical signals in the audio frequency range into audible sounds, the combination comprising decoder means respectively having a plurality of decoder outputs corresponding to the number of code tones in the sequence and having an input coupled to the processor circuit, said decoder means being responsive to the first code tone in the sequence being of predetermined frequency to provide a first control signal on a first of said decoder outputs for a duration related to the duration of the first detected code tone, said decoder means being responsive to the last detected code tone in the sequence being of predetermined frequency to provide a last control signal on a last of said decoder outputs for a duration related to the duration of the last detected code tone, first duration-detector means having an input coupled to said first decoder output and having at least a pair of first detector outputs, said first duration-detector means being responsive to a first control signal of shortest duration to produce an output signal on one of said first detector outputs and being responsive to a first control signal on the other of said first detector outputs, said one first detector output being coupled to said decoder means for rendering same operative to respond to the second detected code tone in the sequence, second duration-detector means having an input coupled to said last decoder output and having at least a pair of second detector outputs, said second duration-detector means being responsive to a last control signal of shortest duration to produce a detected signal on one of said second detector outputs and being responsive to a second control signal of longer duration to produce an output signal on the other of said second detector outputs, first latch means coupled to both of said other detector outputs and being set when detected signals appear on either of said other detector outputs, second latch means coupled to said one second detector output and being set when a detected signal appears thereon, reset means for resetting both of said latch means simultaneously a predetermined time after setting thereof, clock means for producing a pulsating signal at an audio frequency, and logic means coupled to said first and second latch means and to said clock means for producing one of several alerting tones having characteristics and durations corresponding to the conditions of said latch means, the alerting tone being coupled to the transducer.

49. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first condition and being responsive to a predetermined code to be placed in a second condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means coupled to said manually operable switch means and to said timer means and being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to provide an indefinitely extending enabling signal for the audio circuit, said electronic switch means being responsive to subsequent operation of said manually operable switch means to terminate the enabling signal.

50. In the communication receiver of claim 49, wherein said manually operable switch means is a push-button switch spring biased to said first position.

51. In the communication receiver of claim 49, wherein said manually operable switch means is open in the first position thereof and is closed in the second position thereof.

52. In the communication receiver of claim 49, wherein said timer means includes a clock, and a divider circuit having a signal input coupled to said clock and a reset input coupled to said manually operable switch means and operable to divide the signal from said clock by a predetermined divisor, said divider circuit being operable when said manually operable switch means is placed in said second position.

53. In the communication receiver of claim 52, wherein said divider circuit produces an output about one-half second after said manually operable switch means is operated to said second position.

54. In the communication receiver of claim 49, wherein said electronic switch means reverts to the first condition thereof upon said subsequent operation irrespective the duration of said manually operable switch means is operated.

55. In the communication receiver of claim 49, wherein said electronic switch means includes a D flip-flop circuit having a clock input and a reset input and a D input and an output, said clock input and said reset input being coupled to said manually operable switch, a first flip-flop circuit having reset inputs coupled to the output of said D flip-flop circuit and to said timer means and having a set input coupled to said manually operable switch means and having an output, and a second flip-flop circuit having a clock input coupled to the output of said D flip-flop circuit and having an output coupled to the D input of said D flip-flop circuit and to the audio circuit.

56. In the communication receiver of claim 55, wherein the clock input of said D flip-flop circuit is a pair of terminals for receiving signals of opposite polarity, and the clock input of said second toggle flip-flop circuit is a pair of terminals for receiving signals of opposite polarity.

57. In the communication receiver of claim 49, and further comprising a Schmitt trigger having an input coupled to said manually operable switch means and having an output coupled to said timer means and to said electronic switch means.

58. In the communication receiver of claim 49, wherein the predetermined time is about 0.5 second.

59. In the communication receiver of claim 49, wherein the audio circuit is coupled to said manually operable switch means so that actuation to the second position thereof enables the audio circuit for the length of time said manually operable switch means is in such second position.

60. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, an audio circuit selectively operative to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising decoder means coupled to the processor circuit and being responsive to a predetermined code to provide a first decoder signal persisting for a predetermined duration after the code and to provide a second decoder signal terminating by the end of the code, the audio circuit being coupled to said decoder means and being responsive to said first decoder signal to be operative to process electrical signals, manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means coupled to said manually operable switch means and to said timer means and to the decoder means and being normally in a first condition, said electronic switch means being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to be placed in a second condition for an indefinite period of time, said electronic switch means being also responsive to the second decoder signal to be placed in the second switch condition for an indefinite period of time, said electronic switch means reverting to the first condition in response to subsequent operation of said manually operable switch means, gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second condition to provide a gate signal to enable the audio circuit, and battery saver means for producing a pulsed supply voltage for at least the processor circuit, said battery saver means being coupled to the decoder means and being responsive to the first decoder signal to provide a continuous supply voltage for a predetermined period of time, said battery saver means being coupled to said electronic switch means and being responsive to the second switch condition thereof to reduce the rate of the pulsed supply voltage after the predetermined period of time.

61. In the communication receiver of claim 60, wherein the predetermined duration depends on the character of the code.

62. In the communication receiver of claim 60, wherein the predetermined duration is longer for a carrier wave modulated by both the code and intelligence signals than when the carrier wave is modulated by only a code.

63. In a selective cell communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second decoder condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means coupled to said manually operable switch means and to said timer means and to the decoder circuit and being normally in a first switch condition, said electronic switch means being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to be placed in a second switch condition for an indefinite period of time, said electronic switch means being also responsive to the decoder circuit being in the second decoder condition to be placed in the second switch condition for an indefinite period of time, said electronic switch means reverting to the first switch condition in response to subsequent operation of said manually operable switch means, and gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a gate signal to enable the audio circuit.

64. In the communication receiver of claim 63, wherein said manually operable switch means is a push-button switch spring biased to said first position.

65. In the communication receiver of claim 63, wherein said manually operable switch means is open in the first position thereof and is closed in the second position thereof.

66. In the communication receiver of claim 63, wherein said timer means includes a clock, and a divider circuit having a signal input coupled to said clock and a reset input coupled to said manually operable switch means and being operable to divide the signal from said clock by a predetermined divisor, said divider circuit being operable when said manually operable switch means is placed in said second position.

67. In the communication receiver of claim 66, wherein said divider circuit produces an output about one-half second after said manually operable switch means is operated to the second position.

68. In the communication receiver of claim 63, wherein said electronic switch means reverts to the first condition thereof upon the subsequent operation irrespective the duration of said manually operable switch means is operated.

69. In the communication receiver of claim 63, wherein said electronic switch means includes a D flip-flop circuit having a clock input and a reset input and a D input and an output, said clock input and said reset input being coupled to said manually operable switch means, a first set/reset flip-flop circuit having a reset input coupled to the output of said D flip-flop circuit and to said timer means and having a set input coupled to said manually operable switch means and having an output, and a second flip-flop circuit having a clock input coupled to the output of said first set/reset flip-flop circuit and having an output coupled to the D input of said D flip-flop circuit and to the audio circuit.

70. In the communication receiver of claim 69, wherein the clock input of said D flip-flop circuit is a pair of terminals for receiving signals of opposite polarity, and the clock input of said second flip-flop circuit is a pair of terminals for receiving signals of opposite polarity.

71. In the communication receiver of claim 63, and further comprising a Schmitt trigger having an input coupled to said manually operable switch means and having an output coupled to said timer means and to said electronic switch means.

72. In the communication receiver of claim 63, wherein said electronic switch circuit includes means to be rendered unresponsive to subsequent predetermined codes.

73. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second decoder condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means coupled to said manually operable switch means and to said timer means and to the decoder circuit and being normally in a first switch condition, said electronic switch means being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to be placed in a second switch condition for an indefinite period of time, said electronic switch means being also responsive to the decoder circuit being in the second decoder condition to be placed in the second switch condition for an indefinite period of time, said electronic switch means reverting to the first switch condition in response to subsequent operation of said manually operable switch means, gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a gate signal to enable the audio circuit, and battery saver means for producing a pulsed supply voltage for at least the processor circuit, said battery saver means being coupled to said electronic switch means and being responsive to the second switch condition thereof to increase the rate of the pulsed supply voltage.

74. In the communication receiver of claim 73, wherein said battery saver means produces a pulsed supply voltage for the processor circuit and at least part of the audio circuit and at least part of the decoder circuit.

75. In the communication receiver of claim 73, wherein the duration of the pulses at the increased rate is the same as such duration at the unmodified rate.

76. In the communication receiver of claim 73, wherein the time between pulses is reduced by at least 70% in response to the second switch condition.

77. In the communication receiver of claim 73, wherein the time between pulses is normally about 1.75 seconds, and the time between pulses in response to the second switch condition is about 0.5 second.

78. In the communication receiver of claim 73, wherein said battery saver means includes a pulser circuit to produce a sequence of pulses, and an OR gate having a first input coupled to said pulser circuit and a second input coupled to the decoder circuit and an output coupled to provide the supply voltage for the processor circuit.

79. In the communication receiver of claim 78, wherein said battery saver means includes an electronic power switch coupled to the output of said OR gate selectively to provide the pulsed supply voltage and the continuous supply voltage.

80. In the communication receiver of claim 73, wherein said battery saver means includes a clock, and a divider circuit having a signal input coupled to said clock and having a reset input and two output means, and a latch circuit coupled to said output means and being operative to respond to signals on a selected one of said output means cyclically to provide reset signals at a corresponding rate.

81. In the communication receiver of claim 80, wherein said battery saver means includes a gate having one input coupled to one of said output means and having a control input coupled to said electronic switch means.

82. In the communication receiver of claim 80, wherein said divider circuit includes a chain of divide-by-two flip-flop circuits.

83. In the communication receiver of claim 80, wherein said divider circuit includes a chain of divide-by-two flip-flop circuits, and means for combining the outputs of at least two of said flip-flop circuits and coupling a signal representative thereof to the latch circuit.

84. In the communication receiver of claim 73, wherein the combination further comprises a first OR gate having a first input coupled to the decoder circuit and a second input coupled to said electronic switch means and having an output coupled to the audio circuit, and said battery saver means include a pulser circuit and a second OR gate having a first input coupled to the output of said first OR gate and a second input coupled to said pulser circuit.

85. In the communication receiver of claim 84, wherein said second OR gate has a third input coupled to the decoder circuit to cause the supply voltage to be continuous during the code.

86. In the communication receiver of claim 73, wherein said battery saver means is coupled to the decoder circuit and is responsive to the second decoder condition to provide a continuous supply voltage for a predetermined period of time, said battery saver means being responsive to the second switch condition to increase the rate of the pulse supply voltage after the predetermined period of time.

87. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second decoder condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means having a control input selectively coupled to an enabling voltage and being operative only in the presence of an enabling voltage on said control input and being normally in a first switch condition, said electronic switch means being coupled to said manually operable switch means and to said timer means and being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to be placed in a second switch condition for an indefinite period of time, first gate means having a control input selectively connected to an enabling voltage and having a signal input coupled to the decoder circuit and having an output coupled to said electronic switch means, said first gate means being operative to produce a first gate signal in the presence of a predetermined code when an enabling signal is applied to the control input of said first gate means, said electronic switch means being also responsive to the first gate signal to be placed in the second switch condition for an indefinite period of time, said electronic switch means reverting to the first switch condition in response to subsequent operation of said manually operable switch means, and second gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a second gate signal to enable the audio circuit, and third gate means having a control input selectively connected to an enabling voltage and a signal input coupled to said electronic switch means and being operative in the presence of an enabling voltage and said electronic switch means being in the second switch condition thereof to provide a third gate signal to enable the audio circuit.

88. In the communication receiver of claim 87, wherein the enabling voltage for said first and third gate means and said electronic switch means is ground.

89. In the communication receiver of claim 87, wherein the control inputs of said first and third gate means are connected together and simultaneously connectable to the enabling voltage.

90. In the communication receiver of claim 87, and further comprising a Schmitt trigger having an input coupled to said manually operable switch means, the output of said Schmitt trigger being coupled to said timer means and to said electronic switch means.

91. In the communication receiver of claim 87, and further comprising fourth gate means having a control input selectively coupled to an enabling voltage and having a signal input coupled to said manually operable switch means and having an output coupled to said electronic switch means, said fourth gate circuit being operative to couple actuations of said manually operable switch means from said electronic switch means and said timer means only when the control input of said fourth gate means is coupled to an enabling voltage.

92. In the communication receiver of claim 91, wherein the control inputs of said fourth gate means and said electronic switch means are connected together and simultaneously connectable to the enabling voltage.

93. In the communication receiver of claim 87, wherein the audio circuit is coupled to said manually operable switch means so that operation to the second position thereof enables the audio circuit for the length of time said manually operable switch means is in such second position irrespective of whether the control input of either of said first or third gate means or electronic switch means is coupled to the enabling voltage.

94. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second decoder condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising, manually operable switch means operable between first and second positions, timer means coupled to said manually operable switch means and being responsive to said switch means being in said second position for at least a predetermined time to provide a timer signal, electronic switch means having a control input selectively coupled to an enabling voltage and being operative only in the presence of an enabling voltage on said control input and being normally in a first switch condition, said electronic switch means coupled to said manually operable switch means and to said timer means and being responsive to the concurrence of the timer signal and said manually operable switch being in the second position to be placed in a second switch condition for an indefinite period of time, first gate means having a control input selectively connectable to an enabling voltage and having a signal input coupled to the decoder circuit and having an output coupled to said electronic switch means, said first gate means being operative to produce a first gate signal in the presence of a predetermined code when an enabling signal is applied to the control input of said first gate means, said electronic switch means being also responsive to the gate signal to be placed in the second switch condition for an indefinite period of time, said electronic switch means reverting to the first switch condition in response to subsequent operation of said manually operable switch means, second gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a gate signal to enable the audio circuit, third gate means having a control input selectively connectable to an enabling voltage and having a signal input coupled to said electronic switch means and being operative in the presence of an enabling voltage and said electronic switch means being in the second switch condition thereof to provide a third gate signal to enable the audio circuit, and battery saver means for producing a pulsed supply voltage for at least the processor circuit, said battery saver means being coupled to said electronic switch means and being responsive to the second switch condition thereof to increase the rate of the pulsed supply voltage.

95. In the communication receiver of claim 94, wherein said battery saver means is coupled to the decoder circuit and is responsive to the second decoder condition to provide a continuous supply voltage for a predetermined period of time, said battery saver means being responsive to the second switch condition to increase the rate of the pulse supply voltage after the predetermined period of time.

96. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and to separate the code from the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, the combination comprising switch means normally in a first switch condition and being placeable in a second switch condition, battery saver means for producing a pulsed supply voltage for at least part of the processor circuit, said battery saver means being coupled to the decoder circuit and being responsive to the second decoder condition to provide a continuous supply voltage for a period of time, said battery saver means being coupled to said switch means and being responsive to the second switch condition thereof to increase the rate of the pulsed supply voltage.

97. In the communication receiver of claim 96, wherein said battery saver means produces a pulsed supply voltage for the processor circuit and at least part of the decoder circuit.

98. In the communication receiver of claim 96, wherein the duration of the pulses at the increased rate is the same as such duration at the unmodified rate.

99. In the communication receiver of claim 96, wherein the time between pulses is reduced by at least 70% in response to the second switch condition.

100. In the communication receiver of claim 96, wherein the time between pulses is normally about 1.75 seconds, and the time between pulses in response to the second switch condition is about 0.5 second.

101. In the communication receiver of claim 96, wherein said battery saver means includes a pulser circuit to produce a sequence of pulses, and an OR gate having a first input coupled to said pulser circuit and a second input coupled to the decoder circuit and an output coupled to provide the supply voltage for the processor circuit.

102. In the communication receiver of claim 101, wherein said battery saver means includes an electronic power switch coupled to the output of said OR gate selectively to provide the pulsed supply voltage and the continuous supply voltage.

103. In the communication receiver of claim 96, wherein said battery saver means includes a clock, and a divider circuit having a signal input coupled to said clock and having a reset input and two output means, and a latch circuit coupled to said output means and being operative to respond to signals on a selected one of said output means cyclically to provide reset signals at a corresponding rate.

104. In the communication receiver of claim 103, wherein said battery saver means includes a gate having one input coupled to one said output means and having a control input coupled to said switch means.

105. In the communication receiver of claim 103, wherein said divider circuit includes a chain of divide-by-two flip-flop circuits.

106. In the communication receiver of claim 103, wherein said divider circuit includes a chain of divide-by-two flip-flop circuits, and means for combining the outputs of at least two of said flip-flop circuits and coupling a signal representative thereof to the latch circuit.

107. In the communication receiver of claim 96, wherein the combination further comprises a first OR gate having a first input coupled to the decoder circuit and a second input coupled to said switch means and having an output, and said battery saver means include a pulser circuit and a second OR gate having a first input coupled to the output of said first OR gate and a second input coupled to said pulser circuit.

108. In the communication receiver of claim 107, wherein said second OR gate has a third input coupled to the decoder circuit to cause the supply voltage to be continuous during the code.

109. In the communication receiver of claim 96, wherein said switch means includes a manual switch placeable in the first switch condition to cause said battery saver means to produce the unmodified pulsed supply voltage and placeable in the second switch condition to cause said battery saver means to produce the pulsed supply voltage at the increased rate.

110. In the communication receiver of claim 96, wherein said battery saver means is responsive to the second decoder condition to provide a continuous supply voltage for a predetermined period of time, said battery saver means being responsive to the second switch condition of said switch means to increase the rate of the pulsed supply voltage after the predetermined period of time.

111. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, an audio circuit coupled to the decoder circuit and being operative when the decoder circuit is in the second decoder condition to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising electronic switch means coupled to the decoder circuit and being normally in a first switch condition and being responsive to the second decoder condition to be placed in a second switch condition for an indefinite period of time, gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a gate signal to enable the audio circuit, and battery saver means for producing a pulsed supply voltage for at least part of the processor circuit, said battery saver means being coupled to said electronic switch means and being responsive to the second switch condition thereof to increase the rate of the pulsed supply voltage.

112. In the communication receiver of claim 111, and further comprising means for resetting said electronic switch means to place it in its first switch condition and thereby cause said battery saver means to produce an unmodified pulsed supply voltage.

113. In the communication receiver of claim 111, wherein said battery saver means is coupled to the decoder circuit and is responsive to the second decoder condition to provide a continuous supply voltage for a predetermined period of time.

114. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by a code and intelligence signals and to separate the code and the intelligence signals from the carrier wave and to provide a squelch signal during the presence of the carrier wave, an audio circuit selectively operative to process electrical signals in the audio frequency range, a transducer coupled to the audio circuit and being operative to convert electrical signals into audible sounds, the combination comprising decode means coupled to the processor circuit and being responsive to a predetermined code to provide a first decoder signal persisting for a predetermined duration after the code and to provide a second decoder signal terminating by the end of the code, the audio circuit being coupled to said decoder means and being responsive to said first decoder signal to be operative to process electrical signals, electronic switch means coupled to said decoder means and being normally in a first condition and being responsive to the second decoder signal to be placed in a second condition for an indefinite period of time, manual operable switch means coupled to said electronic switch means and being operable to cause said electronic switch means to revert to the first condition thereof, gate means having a control input coupled to said electronic switch means and a signal input coupled to the processor circuit and being responsive to the concurrence of a squelch signal and said electronic switch means being in the second switch condition to provide a gate signal to enable the audio circuit, and battery saver means for producing a pulsed supply voltage for at least part of the processor circuit, said battery saver means being coupled to said electronic switch means and being responsive to the second switch condition thereof to increase the rate of the pulsed supply voltage.

115. In the communication receiver of claim 114, wherein the predetermined duration depends on the character of the code.

116. In the communication receiver of claim 114, wherein the predetermined duration is longer for a carrier wave modulated by both the code and intelligence signals than when the carrier wave is modulated by only a code.

117. In the communication receiver of claim 114, wherein said battery saver means is coupled to the decoder means and is responsive to the second decoder condition to provide a continuous supply voltage for a predetermined period of time.

118. In a selective call communication receiver including a processor circuit adapted to receive the carrier wave modulated by a code to separate the code from the carrier wave, the combination comprising a decoder circuit coupled to the processor circuit and being normally in a first decoder condition and being responsive to a predetermined code to be placed in a second decoder condition, said decoder circuit including timer means for evaluating the code and clock means for producing a clock signal for said timer means, and battery saver means for producing a pulsed supply voltage for at least part of the processor circuit, said battery saver means being coupled to said decoder circuit and being responsive to the second decoder condition to provide a continuous supply voltage for the processor circuit, said clock means including a gate coupled to said battery saver means and being responsive to the pulsed supply voltage to cause the clock signal to be applied intermittently to said timer means and being responsive to the continuous supply voltage to couple the clock signal continuously to said timer means.

119. In the communication receiver of claim 118, wherein said clock includes an oscillator and a divider chain coupled thereto, said gate being coupled between said oscillator and said timer means.

120. In a selective call communication receiver including a processor circuit adapted to receive a carrier wave modulated by at least one code tone and to separate the code tone from the carrier wave, the code tone being selected from a plurality of code tones of different frequency, the combination comprising filter means responsive to a code tone of predetermined frequency to provide a sinusoidal wave, means for converting the sinusoidal wave into a train of tone pulses, circuit means responsive to the first of the tone pulses exceeding a predetermined duration to provide a control signal, the control signal commencing during the first of the tone pulses, the predetermined duration being substantially the same for all of the different frequencies, said circuit means having only on and off conditions, the control signal being produced when said circuit means is in one of such conditions, and battery saver means for producing a pulsed supply voltage for at least part of the processing circuit, said battery saver means being responsive to the control signal to provide a continuous supply voltage for a period of time.

121. In the communication receiver of claim 120, wherein each of the pulses of the supply voltage produced by said battery saver means has a duration of less than 50 milliseconds.