Input signal level control device for receiver

• US 4,393,513 A
• Filed: 05/14/1981
• Issued: 07/12/1983
• Est. Priority Date: 05/19/1980
• Status: Expired due to Fees

• Current Assignee: Pioneer Electronics (USA) Incorporated (Pioneer Corporation)
• Original Assignee: Pioneer Electronics Corporation (Pioneer Corporation)
• Inventors: Gomi, Shintaro, Yokogawa, Tomoshisa
• Primary Examiner(s): Ng, Jin F.
• Application Number:
  US06/263,543
• Time in Patent Office: 789 Days
• Field of Search: 455/239, 455/242, 455/243, 455/245, 455/249, 455/250, 455/253, 330/284
• US Class Current: 455/242.2
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence

Abstract

An input signal level control device for a receiver particularly adapted for use in a mobile FM receiver in which the received electric field strength changes abruptly and greatly. An attenuating device such as a switching diode is coupled to an input of a high frequency amplifier to which the input received signal is fed. The attenuating device switches on when the received electric field strength reaches the first predetermined value. As the electric field strength continues to increase and reaches a second value greater than the first, a control circuit controls the gain of the high frequency amplifier in accordance with the electric field strength.

Claims

1. An input signal level control device for a receiver comprising:

a first capacitor having a first terminal coupled to an antenna terminal;

a first coil having a first terminal coupled to a second terminal of said first capacitor and a second terminal coupled to ground;

a switching diode having a cathode terminal coupled to said first terminal of said first coil;

a second capacitor having a first terminal coupled to an anode terminal of said first diode and a second terminal coupled to ground;

an antenna tuning circuit having an input terminal coupled to said first terminal of said coil;

a dual-gate field-effect transistor, one of source and drain electrodes of said field-effect transistor being coupled to ground;

a third capacitor having a first terminal coupled to an output of said antenna tuning circuit and a second terminal coupled to a first gate of said field-effect transistor;

a first resistor having a first terminal coupled to said first gate of said field-effect transistor and a second terminal coupled to ground;

a second coil having a first terminal coupled to the other of said source and drain electrodes of said field-effect transistor;

a second resistor having a first terminal coupled to said first gate of said field-effect transistor and a second terminal coupled to a second terminal of said second coil;

a third capacitor having a first terminal coupled to said second terminal of said second coil and the second terminal coupled to ground;

a first filter having an input coupled to said first terminal of said second coil;

a frequency converter circuit having an input coupled to an output of said first filter;

an inter-stage transformer having an input coupled to an output of said frequency converter;

a second filter having an input coupled to an output of said inter-stage transformer;

a first amplifier having an input coupled to an output of said second filter;

a second amplifier having an input coupled to an output of said first amplifier;

a fourth capacitor having a first terminal coupled to an output of said second amplifier;

second and third diodes, an anode of said second diode being coupled to a cathode of said third diode and to a second terminal of said fourth capacitor;

a third resistor having a first terminal coupled to an anode of said third diode and a second terminal coupled to a cathode of said second diode and to said second terminal of said second coil;

a fifth capacitor coupled in parallel with said third resistor;

a PNP transistor having a base coupled to said first terminal of said third resistor and an emitter coupled to said second terminal of said third resistor;

a fourth resistor having a first terminal coupled to a collector of said PNP transistor and a second terminal coupled to said anode terminal of said first diode;

a fifth resistor having a first terminal coupled to said collector of said PNP transistor;

a sixth resistor having a first terminal coupled to a second terminal of said fifth resistor and a second terminal coupled to ground;

an NPN transistor having a base coupled to said second terminal of said fifth resistor and an emitter coupled to ground;

a seventh resistor having a first terminal coupled to a collector of said NPN transistor and a second terminal coupled to said emitter of said PNP transistor;

an eighth resistor having a first terminal coupled to said collector of said NPN transistor;

a sixth capacitor having a first terminal coupled to a second terminal of said sixth resistor and a second terminal coupled to ground;

a ninth resistor having a first terminal coupled to said second terminal of said eigth resistor and a second terminal coupled to a second gate of said field-effect transistor, a positive supply voltage being applied to said emitter of said PNP transistor.

3. The input signal level control device of claim 1 or 2 wherein said antenna tuning circuit comprises a second coil having primary and secondary windings, a first terminal of said primary winding being coupled to said cathode terminal of said first diode, a second terminal of said primary winding being coupled to a first terminal of said secondary winding and to ground;

first and second variable capacitance diodes having cathode terminals coupled together and to a source of a tuning voltage, an anode terminal of said first variable capacitance diode being coupled to ground and an anode terminal of said second variable capacitance diode being coupled to a second terminal of said secondary winding of said second coil; and

a seventh capacitor having a first terminal coupled to said anode terminal of said second variable capacitance diode and a second terminal coupled to ground.

2. An input signal level control device for a receiver comprising:

a first capacitor having a first terminal coupled to an antenna terminal;

a first coil having a first terminal coupled to a second terminal of said first capacitor and a second terminal coupled to ground;

a switching diode having a cathode terminal coupled to said first terminal of said first coil;

a second capacitor having a first terminal coupled to and an anode terminal of said first diode and a second terminal coupled to ground;

an antenna tuning circuit having an input terminal coupled to said first terminal of said coil;

a dual-gate first-effect transistor, one of a source and drain electrodes of said field-effect transistor being coupled to ground;

a third capacitor having a first terminal coupled to an output of said antenna tuning circuit and a second terminal coupled to a first gate of said field-effect transistor;

a first resistor having a first terminal coupled to said first gate of said field-effect transistor and a second terminal coupled to ground;

a second coil having a first terminal coupled to the other of said source and drain electrodes of said field-effect transistor;

a second resistor having a first terminal coupled to said first gate of said field-effect transistor and a second terminal coupled to a second terminal of said second coil;

a third capacitor having a first terminal coupled to said second terminal of said second coil and the second terminal coupled to ground;

a first filter having an input coupled to said first terminal of said second coil;

a frequency converter circuit having an input coupled to an output of said first filter;

an inter-stage transformer having an input coupled to an output of said frequency converter;

a second filter having an input coupled to an output of said inter-stage transformer;

a first amplifier having an input coupled to an output of said second filter;

a second amplifier having an input coupled to an output of said first amplifier;

a fourth capacitor having a first terminal coupled to an output of said second amplifier;

second and third diodes, an anode of said second diode being coupled to a cathode of said third diode and to a second terminal of said fourth capacitor;

a third resistor having a first terminal coupled to an anode of said third diode and a second terminal coupled to a cathode of said second diode and to said second terminal of said second coil;

a fifth capacitor coupled in parallel with said third resistor;

a PNP transistor having a base coupled to said first terminal of said third resistor, an emitter coupled to said second terminal of said third resistor, and a collector coupled to said anode terminal of said first diode;

a fourth resistor having a first terminal coupled to said emitter of said PNP transistor and a second terminal coupled to a positive voltage source and to said first terminal of said third capacitor;

a fifth resistor having a first terminal coupled to said emitter of said PNP transistor;

a sixth capacitor having a first terminal coupled to a second terminal of said fifth resistor and a second terminal coupled to ground; and

a sixth resistor having a first terminal coupled to said second terminal of said fifth resistor and a second terminal coupled to a second gate of said field-effect transistor.

4. An input signal level control device for a receiver receiving an input signal having a particular electric field strength, comprising:

an input signal source;

an attenuating means for attenuating a level of said input signal;

an amplifier means for amplifying said attenuated input signal;

a signal processing means for processing said amplified signal; and

a control means receiving said processed signal, said control means activating said attenuating means when said electric field strength of said input signal reaches a first level and controlling said amplifying means when said electric field strength of said input signal reaches a second level greater than said first level, said control means having a first transistor coupled with a second transistor, said attenuating means being activated by an output of said first transistor and said amplifier means being controlled by an output of said second transistor.

6. The input signal level control device of either one of claims 4 or 5, wherein said attenuating means comprises a switching diode operatively coupled to an antenna terminal of said receiver.

7. The input signal level control device of either one of claims 4 or 5, wherein said attenuating means comprises a switching diode operatively coupled to an antenna terminal of said receiver, and further comprising an antenna-tuning circuit operatively coupled between said diode and said high frequency amplifying means.

8. The input signal level control device of either one of claims 4 or 5, wherein said amplifier means comprises a dual-gate type field effect transistor.

5. An input signal level control device for a receiver receiving an input signal having a particular electric field strength, comprising:

an input signal source;

an attenuating means for attenuating a level of said input signal;

an amplifier means for amplifying said attenuated input signal;

a signal processing means for processing said amplified signal; and

a control means receiving said processed signal for both activating said attenuating means when said electric field strength of said input signal reaches a first level and controlling said amplifying means when said electric field strength of said input signal reaches a second level greater than said first level, said control means comprising an input amplifier having an input coupled to an output of an IF amplifier of said processing means, a rectifying and smoothing circuit having an input coupled to an output of said input amplifier, a first amplifying transistor having a base input coupled to an output of said rectifying and smoothing circuit, a second amplifying transistor having a base input coupled to a collector output of said first transistor, said collector output of said first transistor being connected to said attenuating means, and a collector output of said second amplifying transistor being coupled to a gain control input of said amplifier means.