Multi-processor task dispatching apparatus

• US 4,394,727 A
• Filed: 05/04/1981
• Issued: 07/19/1983
• Est. Priority Date: 05/04/1981
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Loen, Larry W., Hoffman, Roy L., Soltis, Frank G., Houdek, Merle E.
• Primary Examiner(s): Thomas, James D.
• Assistant Examiner(s): Eng, David Y.
• Application Number:
  US06/260,543
• Time in Patent Office: 806 Days
• Field of Search: 364/200, 364/900, 340/825.12
• US Class Current: 718/103
• CPC Class Codes: G06F 9/4881 Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues

Abstract

Task dispatching for an asymmetric or symmetric multiprocessor system is provided where all the processors are dispatched from a single task dispatching queue. The workload, i.e. tasks, of the multiprocessor system is distributed to the available processors. Each processor includes a task dispatcher and a signal dispatcher. The signal dispatcher runs in a processor whenever a task dispatching element (TDE) is put on the task dispatching queue (TDQ) as a result of the task running in the processor. The signal dispatcher examines the TDEs enqueued on the TDQ and determines if any task dispatcher should be invoked, i.e. if any processor is running a lower priority task a task switch should occur. If so, it signals the selected processor to invoke its task dispatcher. After completing the task switch, the selected processor must invoke its signal dispatcher to determine if the task it had been performing should now be performed on some other processor in the multiprocessor system.

Claims

1. Tasking apparatus for a multiprocessor computer system including at least two processors sharing a common main storage containing a task dispatching queue adapted to have task dispatching elements enqueued in priority sequence, each processor having a task dispatcher for dispatching task dispatching elements from said task dispatching queue and for performing task switches when its associated processor is processing a task dispatching element having a priority lower than the priority of a waiting dispatchable task dispatching element on said task dispatching queue, said processors each having an enqueueing mechanism for returning waiting non-dispatchable task dispatching elements to said task dispatching queue, the improvement comprising:

a signal dispatcher for each processor for scanning the priorities of task dispatching elements on said task dispatching queue and signaling another processor to operate its task dispatcher upon finding a task dispatching element on said task dispatching queue having a priority higher than the priority of the task dispatching element being processed by the processor to be signaled, said signal dispatcher being rendered operable in response to said enqueueing mechanism of the associated processor enqueueing a task dispatching element on said task dispatching queue.

2. The tasking apparatus of claim 1 wherein said task dispatching elements include an encoded field for indicating which of said processors are eligible to process said task dispatching elements.

3. The tasking apparatus of claim 1 wherein said task dispatching elements include an encoded field for indicating which processor, if any, is processing the task dispatching element.

4. The tasking apparatus of claim 1 wherein said processor signaled to operate its task dispatcher, to perform a task switch, operates its signal dispatcher upon completing said task switch.

5. The tasking apparatus of claim 1 further comprising locking means selectively operable for locking access to said main storage,

unlocking means selectively operable for locking access to said main storage,

each of said task dispatchers, said signals dispatchers and said enqueueing mechanisms including means for selectively operating said locking and said unlocking means.

6. The tasking apparatus of claim 5 wherein the signal dispatcher of one processor selectively operates said locking means and the task dispatcher in the processor being signaled selectively operates said unlocking means.