Real-time amplitude histogram shaper

• US 4,394,744 A
• Filed: 02/12/1981
• Issued: 07/19/1983
• Est. Priority Date: 02/12/1981
• Status: Expired due to Fees

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Wrench, Edwin H. Jr.
• Primary Examiner(s): Smith, Jerry
• Application Number:
  US06/234,063
• Time in Patent Office: 887 Days
• Field of Search: 364/553, 364/554, 364/852, 358/32, 358/37, 358/164, 358/166, 179/1 P
• US Class Current: 702/109
• CPC Class Codes: G06T 2200/28 involving image processing hardware
• CPC Class Codes: G06T 5/40 using histogram techniques
• CPC Class Codes: G06T 5/92 based on global image properties
• CPC Class Codes: H04N 5/20 Circuitry for controlling amplitude response

Abstract

A real-time amplitude histogram shaper transforms an input analog signal with a corresponding input amplitude histogram to an output signal with a specified output histogram. The histogram shaper comprises a histogram estimator, which estimates the amplitude histogram of an input analog signal. A calculator, whose input is connected to the output of the estimator, computes the transfer function required to transform the input signal to an output signal with the desired amplitude histogram. A controller, whose input is connected to the output of the calculator, generates control signals. A transfer function generator, whose input is connected to the output of the control signal generator, modifies its input signals by a ratio P_out /P_in. The gain P_out /P_in is a function of P_in, that is, P_out /P_in =g(P_in).P_out is the magnitude of the output parameter and P_in is the magnitude of the input parameter, the output signal thereby having the desired amplitude histogram. Generally, the parameter P would be a voltage V.

Claims

1. A real-time amplitude histogram shaper transforming an input signal V_n according to a first histogram having levels of voltage amplitude into an output signal according to a second histogram having levels of voltage amplitude, comprising:

means for receiving an input analog signal V_in ;

means, whose input is connected to the receiving means, for estimating the histogram of the input signal;

means, whose input is connected to the output of the estimating means, for computing the transfer function required to transform the input signal to an output signal with a desired amplitude histogram;

means, whose input is connected to the output of the computing means, for generating control signals;

means, one of whose two inputs is connected to the receiving means and the other to the output of the generating means, which modifies its input signals by the transfer function g(V_in)=V_out /-V_in where V_out is the magnitude of the output voltage and V_in is the magnitude of the input voltage, the input levels of voltage amplitude being V₁, V₂, . . . , V_n, the output signal thereby having the form of the desired amplitude histogram;

wherein

the transfer function modifying means includes n channels, and comprises;

the means for receiving the input analog signal V_in, the means being a common junction point for the n channels;

a plurality of n means for voltage translation, one in each of n channels, each means for receiving two input signals, the signal V_in and the signal comprising the inverted voltages V₁, V₂, V₃, . . . , V_n, and for translating the input signal V_in by the voltage V₁, V₂, V₃, . . . , V_n, respectively;

wherein

The plurality of means for voltage translation comprises n diodes connected to the inputs of two adjacent channels, the n-th diode being connected to a source of bias voltage;

a plurality of n saturating unity-gain means, one in each of the n channels, the inputs of the n saturating means being connected to the outputs of the n translating means, each saturating means passing only the signals corresponding to an input signal within a specific voltage range;

the plurality of n saturating unit gain means comprising;

a resistor, in the range of 1k, in series in each channel, one end of the resistor in the first channel being connected to the receiving means, all of the other resistors having one end connected to the junction of two diodes; and

a plurality of n double-diode clippers, one end of each being connected to the other end of the resistor, the other end of each being connected to a source of bias voltage;

the transfer function modifying means further comprising;

a plurality of n means for amplifying, each having an input connected to the output of one of the saturating unity-gain means, for amplifying the signals in the first through n-th channels by a magnitude g₁ through g_n, respectively;

the plurality of means for amplifying comprising n field-effect transistors (FETs), each of whose source is connected to the junction of the resistor and the double-diode clipper, and each of whose gate is connected to the means for generating control signals;

the transfer function modifying means further comprising;

a means for summing, having n inputs connected to the n outputs of the plurality of amplifying means;

the means for summing comprising;

a plurality of n resistors, in the range of 22k, one end of each being connected to the drain of the FET, the other end of each resistor being connected to a common junction; and

an operational amplifier whose input is connected to the common junction of the resistors, the output signal of the summing means being the desired amplitude histogram.