Electronic timepiece with dot matrix display

• US 4,396,295 A
• Filed: 09/12/1980
• Issued: 08/02/1983
• Est. Priority Date: 09/20/1979
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Daini
• Original Assignee: Kabushiki Kaisha Daini Seikosha
• Inventors: Ishikawa, Takehiro
• Primary Examiner(s): Miska, Vit W.
• Application Number:
  US06/186,535
• Time in Patent Office: 1,054 Days
• Field of Search: 340/792, 340/755, 368/82-84, 368/239-242, 368/223, 368/231
• US Class Current: 368/82
• CPC Class Codes: G04G 9/082 using multiplexing techniques

Abstract

An electronic timepiece has time-keeping circuitry for generating time signals representative of different units of time such as minute, hour, day and date. An elongate dot matrix display displays time information in character form in response to drive signals applied thereto, and electronic circuitry processes the time signals and produces a plurality of sets of drive signals each representative of a different unit of time and applies the sets of drive signals to the dot matrix display to cause the dot matrix display to sequentially display therealong in a repetitive sweeping motion different sets of characters corresponding to the different units of time.

Claims

1. In an electronic timepiece having a dot matrix display, a time counting circuit, a character generator for decoding the counted content of the time counting circuit, shift means for temporarily retaining a lateral portion of the character pattern of the character generator, a longitudinal driver circuit for effecting the display of the content of the shift means by the dot matrix display, and a lateral driver circuit for providing a lateral signal to the dot matrix display, the improvement comprising:

latch circuit means for retaining part of the lateral portion of the character pattern in the shift means, the latch circuit means having its input connected to the output of the shift means and its output connected to the input of the longitudinal driver circuit, and the memory capacity of the latch circuit means being smaller than the memory capacity of the shift means;

shift pulse generating means operative when activated for applying a shift pulse to the shift means; and

switch means for activating the shift pulse generating means.

2. An electronic timepiece according to claim 1;

further comprising sweeping stop means for counting a sweep time and for inhibiting the generation of the shift pulse after the elapse of the sweep time.

3. An electronic timepiece according to claim 1;

wherein the shift pulse generating means includes means for producing a plurality of shift pulse trains each different in frequency from the other.

4. An electronic timepiece according to claim 1;

wherein the memory capacity of the latch circuit means is smaller by one character pattern than the memory capacity of the shift means.

5. A method of displaying a plurality of characters on a dot matrix display comprising:

providing a character generator for generating character information in which one character is composed of m columns and n lines; and

sequentially providing line information of the characters to a shift register by the steps of providing a plurality of character information of the first line to the n-th line to the shift register, providing part of the line information of the shift register to a latch circuit connected to the shift register, shifting the character displaying location on the dot matrix display by one column by applying one clock pulse to the shift register, executing the shifting step m times so that the character displaying location is shifted by one character, and shifting the character information to be stored in the shift register by one character thereby shifting by one character the location of the character on the dot matrix display.