Event-logging system

• US 4,400,783 A
• Filed: 09/05/1980
• Issued: 08/23/1983
• Est. Priority Date: 09/05/1980
• Status: Expired due to Term

• Current Assignee: VZ Corporation
• Original Assignee: Westinghouse Electric Company LLC (Brookfield Asset Management Incorporated)
• Inventors: Maxwell, Albert H. Jr., Locke, Philip F. Jr.
• Primary Examiner(s): Wise, Edward J.
• Application Number:
  US06/184,458
• Time in Patent Office: 1,082 Days
• Field of Search: 364/483, 364/550, 364/900, 364/200, 340/173 AS, 324/113
• US Class Current: 702/58
• CPC Class Codes: G01D 4/00 Tariff metering apparatus in taximeters G07B13/00; apparatus actuated by coins, cards or the like with meter-controlled dispensing of liquid, gas, or electricity G07F15/00
• CPC Class Codes: G01D 9/005 Solid-state data loggers

Abstract

A solid-state event-logging system records the occurrence of specified events in a removable, solid-state, memory cartridge. Counters continuously count pulses produced by a plurality of electrical energy measuring devices. Sample values of the continuous counts are produced and input to a microprocessor wherein each sample value has the previous sample value subtracted therefrom. The difference is added to an interval sum stored in a random access memory. The interval sums, together with real time information produced by a clock, are input to the memory cartridge according to a predetermined format. The clock is maintained in synchronization with the frequency of the line voltage by the microprocessor.

Claims

1. An event-logging system for recording digital data from a plurality of electrical energy metering devices, comprising:

input counters for continuously counting the pulses of the digital data, said counters producing a plurality of running counts each representative of said data produced by one of the metering devices;

control means for producing a plurality of control signals;

means for sampling said running counts, said means producing sample values of each of said running counts in response to said control signals, each of said sample values being input to said control means wherein said sample value has the previous sample value subtracted therefrom, the difference from said subtraction added to an interval sum stored in said control means;

means for producing an interrupt signal composed of pulses responsive to the frequency of a line voltage, said interrupt signal input to said control means, said control means producing a clock interrogation signal responsive to said interrupt signal, said control means producing a synchronization count in response to said pulses of said interrupt signal;

clock means producing real time information, said real time information input to said control means in response to said clock interrogation signal, said synchronization count compared by said control means to a predetermined value at preselected times, said clock means being reset by said control signals in response to said comparison such that said clock means is kept in synchronization with said line voltage;

a cartridge comprising removable solid state memory means; and

output interface means, said means inputting said real time information and said interval sums to said removable memory means according to a predetermined format in response to said control signals, said control means resetting said interval sums to zero upon the recording in said removable memory means of said interval sums.

2. The system of claim 1 wherein the system continues to function when the removable solid state memory means is removed.

3. The system of claim 1 wherein the removable solid state memory means is turned on and off by the control means.

4. The system of claim 1 including an input interface for both receiving the digital data and protecting the input counters from electrical surges.

5. The system of claim 1 wherein the input counters include four, four-bit counters.

6. The system of claim 1 wherein said system is powered by a primary voltage comprising an external source voltage and wherein the control means includes a microprocessor, a read only memory containing preprogrammed information, a random access memory, and a bus interconnecting said aforementioned elements.

7. The system of claim 6 including means for providing a backup voltage for said primary voltage, said backup voltage input to the random access memory.

8. The system of claim 6 wherein the preprogrammed information includes instructions for the microprocessor and includes typical values for program variables.

9. The system of claim 6 including a power supply producing a supply voltage, and including a reset circuit, said circuit producing a reset signal for resetting the microprocessor, said reset signal responsive to the leading edge of said supply voltage.

10. The system of claim 9 including a power outage detection circuit, said circuit monitoring said power supply and producing a power failure signal, and including a transmission gate connecting the microprocessor to the random access memory, said gate responsive to said power failure signal such that said random access memory is disconnected from said microprocessor in the event of a power failure.

11. The system of claim 9 including a comparator responsive to both the supply voltage and a fixed reference voltage, the reset circuit produces the reset signal in response to said comparison such that the microprocessor is reset when the supply voltage sags.

12. The system of claim 1 wherein the sample values are produced faster than the input counters can roll over by continuous counting.

13. The system of claim 1 wherein the means producing the interrupt signal includes a divide by sixty counter responsive to the frequency of a sixty hertz line voltage.

14. The system of claim 1 wherein the real time information includes the month, day of month, hours, minutes and seconds.

15. The system of claim 14 wherein one of the pulses of the interrupt signal is produced every second.

16. The system of claim 15 wherein the synchronization count has an initial value of sixty, and wherein the control means decrements said count in response to the pulses of the interrupt signal, and wherein the control means compares said count to a value of zero once each hour, said control means resetting the clock means in response to said comparison.

17. The system of claim 14 wherein the control means contains preprogrammed information, and wherein the real time information is compared by the control means to said preprogrammed information, said control means updating the month and day of month information in response to said comparison.

18. The system of claim 1 wherein the removable solid state memory means includes a cartridge containing a solid state memory.

19. The system of claim 18 wherein the solid state memory includes an ultra-violet, erasable, programmable, read only memory.

20. The system of claim 18 wherein the solid state memory includes an electrically erasable, read only memory.

21. The system of claim 18 wherein the solid state memory includes a random access memory.

22. The system of claim 18 wherein the solid state memory includes a bubble memory.

23. The system of claim 1 including an input/output interface for automatically receiving meter readings from the metering devices, said readings being input to the removable memory means according to a predetermined format.

24. The system of claim 1 wherein the control means contains preprogrammed information, and including an input interface for receiving instructions for modifying said preprogrammed information.

25. The system of claim 1 wherein the control means contains preprogrammed information including a write error subroutine instructing said control means to read preselected data which said control means has written, said control means writting an error flag when said data is incorrectly written.

26. The system of claim 25 wherein the write error subroutine includes instructing the control means to read the error flag, said control means rewriting the data when said error flag is correctly written, said control means adjusting an address location and rewriting said error flag when said first error flag is incorrectly written.

27. The system of claim 26 wherein the write error subroutine includes instructing the control means to read the rewritten data, said control means writing an error flag when said written data is incorrectly written.

28. The system of claim 1 including output means producing output signals representative of the status of the control means.

29. The system of claim 1 wherein the control means contains preprogrammed information including instructions for both a normal cartridge change procedure and a manual cartridge change procedure.

30. The system of claim 29 wherein the instructions for both the normal cartridge change and the manual cartridge change includes the performance of diagnostic tests on said cartridge.

31. The system of claim 30 wherein the diagnostic tests include a test for erasures to determine if the cartridge is fresh.

32. The system of claim 30 wherein the diagnostic tests include a test for capacity to determine if the cartridge has sufficient capacity for its intended use.

33. The system of claim 30 wherein the diagnostic tests include a write/read test to determine if the cartridge is functional.

34. The system of claim 1 wherein said system is powered by a primary voltage comprising an external source voltage and including means for providing a backup voltage for said primary voltage, said backup voltage input to the clock means.

35. The system of claim 34 wherein the control means contains preprogrammed information including a primary voltage power failure sequence instructing said control means to prepare for a power failure.

36. The system of claim 35 wherein the power failure sequence includes instructing the control means to store the current real time information.

37. The system of claim 36 wherein the preprogrammed information includes a power up sequence instructing the control means to prepare for normal operation.

38. The system of claim 37 wherein the power up sequence includes instructing the control means to store the current real time information, calculate the difference between the real time information stored during the power failure sequence and said real time information stored during said power up sequence, and to store the result of said calculation.

39. The system of claim 1 wherein the format includes a header record recorded at the beginning of the removable memory means, and includes a data record, and includes a trailer record recorded at the end of said removable memory means.

40. The system of claim 39 wherein the header record includes a write/read test, preprogrammed information, the real time information, and data representative of the meter readings of the electrical energy metering devices.

41. The system of claim 40 wherein the header record includes operator entered real time information input for comparison with the real time information produced by the clock means.

42. The system of claim 39 wherein the data record includes the interval sums and loss of power information.

43. The system of claim 39 wherein the trailer record includes preprogrammed information, the real time information, and data representative of the meter readings of the electrical energy metering devices.

44. The system of claim 43 wherein the trailer record includes operator entered real time information input for comparison with the real time information produced by the clock means.

45. The system of claim 43 wherein the trailer record includes diagnostic information about said system.

46. The system of claim 45 wherein the control means includes a microprocessor, a read only memory, a random access memory, and a bus interconnecting said aforementioned elements, and wherein the diagnostic information includes a read only memory checksum.

47. The system of claim 45 wherein the diagnostic information includes a random access memory checksum.

48. The system of claim 45 including a battery for supplying a backup voltage and wherein the diagnostic information includes a battery test.

49. An event-logging system for recording digital data from a plurality of electrical energy metering devices, said system powered by a primary voltage source and comprising:

input counters for continuously counting the pulses of the digital data, said counters producing a plurality of running counts each representative of said data produced by one of the metering devices;

a microprocessor for producing a plurality of control signals;

a read only memory for containing preprogrammed information;

a random access memory, said microprocessor transferring a portion of said preprogrammed information from said read only memory to said random access memory;

means for sampling said running count, said means producing sample values of each of said running counts in response to said control signals, each of said sample values input to said microprocessor wherein said sample value has the previous sample value subtracted therefrom, the difference from said subtraction added to an interval sum stored in said random access memory;

means producing an interrupt signal composed of pulses corresponding to the frequency of a sixty hertz line voltage, said interrupt signal input to said microprocessor, said microprocessor producing a clock interrogation signal responsive to said interrupt signal, said microprocessor producing a synchronization count responsive to the pulses of said interrupt signal;

clock means producing real time information, said real time information stored in said random access memory in response to said clock interrogation signal, said synchronization count compared by said microprocessor to a predetermined value at preselected times, said clock means being reset by said control signals in response to said comparison such that said clock means is kept in synchronization with said line voltage;

removable memory means;

output interface means receiving a stream of data from said random access memory and inputting said stream of data to said removable memory means according to a predetermined format in response to said control signals, said stream of data including said real time information, a portion of said preprogrammed information and said interval sums, said microprocessor resetting said interval sums to zero upon said stream of data being correctly recorded in said removable memory means;

a power outage detection circuit responsive to failure of the primary voltage source for producing a power failure signal; and

a transmission gate selectively connecting said random access memory and said microprocessor in response to said power failure signal.

50. The system of claim 49 wherein the means for sampling includes a buffer responsive to the input counters and includes a latch responsive to said buffer.

51. The system of claim 49 including a power supply producing a supply voltage, and including a reset circuit, said circuit producing a reset signal for resetting the microprocessor, said reset signal responsive to the leading edge of said supply voltage.

52. The system of claim 51 including a comparator responsive to both the supply voltage and a fixed reference voltage such that the reset circuit produces the reset signal in response to said comparison.