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Semiconductor memory circuit

  • US 4,404,661 A
  • Filed: 10/31/1980
  • Issued: 09/13/1983
  • Est. Priority Date: 10/31/1979
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory circuit of the MOSRAM type comprising:

  • a plurality of bit lines;

    a sense amplifier provided for each bit line for sensing a state of a storage cell selectively coupled to said bit line and for setting said bit line to one of first and second predetermined potentials in response to the sensed state;

    a potential decision circuit provided for each bit line for sensing the potential on the corresponding bit line set by said sense amplifier; and

    a boost circuit operating in response to an output from said potential decision circuit for increasing a potential on the corresponding bit line above a maximum supply potential when said potential decision circuit senses the presence of a predetermined one of said first and second potentials on said bit line for recharging said selected storage cell at a potential above said maximum supply potential.

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