Aimpoint selection processor

• US 4,409,661 A
• Filed: 04/22/1981
• Issued: 10/11/1983
• Est. Priority Date: 08/22/1979
• Status: Expired due to Fees

• Current Assignee: United States Of America As Represented By The Secretary Of The Air Force
• Original Assignee: United States Of America As Represented By The Secretary Of The Air Force
• Inventors: Romanski, John G.
• Primary Examiner(s): Gruber, Felix D.
• Application Number:
  US06/256,362
• Time in Patent Office: 902 Days
• Field of Search: 364/516, 364/521, 235/411, 235/412, 235/413, 343/5 DP, 358/125
• US Class Current: 348/169
• CPC Class Codes: G01S 3/7864 T.V. type tracking systems

Abstract

The selection and designation of an aimpoint on a known type of target appearing in the field of view of a video tracking system imaging sensor is accomplished by (a) developing binary target patterns from quantized sensor data generated in the video tracking system video preprocessor; (b) measuring the moments of the target patterns; (c) developing and storing a target reference pattern data base; (d) computing from real time binary coding and moment measurement data and from the stored target reference pattern data base an ensemble of estimated aimpoints; (e) testing the validity of the estimated aimpoints; and (f) averaging valid estimated aimpoints to provide an output aimpoint signal. Mechanization of the invention comprehends the use of video tracking system functions to provide quantized binary coded target patterns and the use of dedicated accumulators to generate pattern moment measurements. A microprocessor computes and stores the target pattern reference data base and performs the aimpoint selection algorithm.

Claims

1. In a video tracking system having a digital correlation tracker, an imaging sensor, video preprocessor means for spatial and amplitude quantizing of the sensor image into pixels and gray levels and means for computing target discriminant functions therefrom, the improvement residing in an aimpoint selection processor, said aimpoint selection processor comprising

image binary coding means for developing binary target patterns from said discriminant functions,

a moment measuring circuit, responsive to said discriminant functions and the output of said image binary coding means, for measuring the moments of said binary target patterns,

a microprocessor said microprocessor being programmed to:

(a) generate and store, from initial binary coding and moment measurement data, a target reference pattern data base defining target pattern size, aspect angle, selected aimpoint and reference points;

(b) compute, from real time binary coding and moment measurement data and said reference pattern data base, an ensemble of estimated aimpoints; and

(c) average said estimated aimpoints to provide an output aimpoint signal, and

data bus means operably connected to said image binary coding means, said moment measuring circuit and said microprocessor.

2. In a video tracking system, an aimpoint selection processor as defined in claim 1 wherein said microprocessor further performs the functions of;

(a) testing said estimated aimpoints for enclosure in the binary pattern and for clustering properties; and

(b) eliminating from the averaged aimpoint output signal estimated aimpoints not within prescribed tests limits.

3. In a video tracking system, an aimpoint selection processor as defined in claim 2 wherein

said image binary coding means includes a pixel random access holding memory receiving digitized video signals from said digital correlation tracker, an x-y address register responsive to digital correlation tracker and aimpoint processor clocks providing an address for said pixel random access holding memory, an address multiplexer connected to said pixel random access holding memory and receiving discriminant function outputs from said video preprocessor, a discriminant function storage random access memory receiving 1 bit data from said video preprocessor, and a binary pattern random access memory receiving data output from said discriminant function storage random access memory and address from said pixel random access memory, and wherein,

said moment measuring circuit comprises first, second and third programmable read only memories receiving row and column addresses from said x-y address register and providing binary pattern values, addresses and their squares and products to a series of moment accumulators, said moment accumulators also receiving data from said discriminant function storage random access memory and providing input data to said microprocessor.

4. In a video tracking system, an aimpoint selection processor as defined in claim 3 wherein said data bus means comprises a data and control bus addressed by said binary pattern random access memory and said microprocessor, and wherein said aimpoint selection processor includes a multiplexer receiving the outputs of said moment measuring circuit and feeding said data and control bus through a direct memory access interface means, and an output register receiving output aimpoint signals from said microprocessor.