Digital wheel speed sensor

• US 4,409,664 A
• Filed: 03/05/1981
• Issued: 10/11/1983
• Est. Priority Date: 09/27/1979
• Status: Expired due to Term

• Current Assignee: Crane Company
• Original Assignee: Crane Company
• Inventors: Skarvada, Thomas
• Primary Examiner(s): Chin, Gary
• Application Number:
  US06/240,902
• Time in Patent Office: 950 Days
• Field of Search: 364/565, 364/569, 364/426, 303/91, 303/20, 303/103, 303/105, 303/106, 361/236, 361/240, 324/160, 324/161, 324/163, 324/166, 235/92 FQ, 235/92 TF
• US Class Current: 702/148
• CPC Class Codes: B60T 8/172 Determining control parameters used in the regulation, e.g. by calculations involving measured or detected parameters B60T8/17551 takes precedence
• CPC Class Codes: B64C 25/46 Brake regulators for preventing skidding or aircraft somersaulting
• CPC Class Codes: G01P 3/489 Digital circuits therefor

Abstract

An apparatus for precisely measuring the period of a wheel signal generated by a transducer in a brake control system includes a clock for generating a periodic clock signal, a first counter for maintaining a count of clock signal cycles, a second counter for maintaining a count of wheel signal cycles, a gate for selectively enabling and disabling the first and second counters at substantially the same phase angle of the wheel signal, and a computer programmed to read the first and second counters, to control the gate to enable the first and second counters for a period of time, and then to read the first and second counters again to arrive at measure of the elapsed time and the number of wheel signal cycles occurring during the measurement period.

Claims

1. In a brake control system including a rotatable wheel and means, responsive to the wheel, for generating a periodic wheel signal having a frequency indicative of the rotational behavior of the wheel, an apparatus for precisely measuring the time duration of one or more cycles of the wheel signal comprising:

clock means for generating a periodic clock signal;

first counter means for maintaining a count indicative of clock signal cycles;

second counter means for maintaining a count indicative of wheel signal cycles;

gating means for selectively enabling and disabling the first and second counter means, said gating means responsive to the phase of the wheel signal such that the first counter means is consistently enabled and disabled at substantially the same phase angle of the wheel signal;

computer means for controlling the gating means first to enable the first and second counter means and then, after a period of time, to disable the first and second counter means;

means, included in the computer means, for determining whether the first and second counter means have been disabled; and

means, included in the computer means, for reading and storing the counts stored in the first and second counter means after the determining means has determined that the first and second counter means have been disabled.

2. The invention of claim 1 wherein the gating means comprises:

a flip-flop having a data input terminal coupled to an output port of the computer means, a clock input terminal coupled to the wheel signal generating means, and an output terminal, said flip-flop operating to generate a gating signal on the output terminal;

a first gate having an input terminal coupled to the clock means, an output terminal coupled to the first counter means, and a gating terminal coupled to the output terminal of the flip-flop, said first gate operating to selectively gate the clock signal in response to the gating signal generating by the flip-flop;

a second gate having an input terminal coupled to the wheel signal generating means, an output terminal coupled to the second counter means, and a gating terminal coupled to the output terminal of the flip-flop, said second gate operating to selectively gate the wheel signal in response to the gating signal generated by the flip-flop.

3. The invention of claim 1 wherein the computer means further comprises:

means for reading and storing the counts stored in the first and second counter means before the first and second counter means are enabled; and

means for calculating and storing the difference between the before and after counts stored in the first counter means and the difference between the before and after counts stored in the second counter means.

6. The invention of claim 2 wherein the determining means comprises:

means for applying the gating signal to the computer means; and

means, included in the computer means, for sensing the gating signal to determine whether the first and second counter means have been disabled.

4. In a brake control system including a rotatable wheel and means, responsive to the wheel, for generating a periodic wheel signal having a frequency indicative of the rotational behavior of the wheel, an apparatus for precisely measuring the time duration of one or more cycles of the wheel signal comprising:

clock means for generating a periodic clock signal;

first counter means for maintaining a count indicative of clock signal cycles;

second counter means for maintaining a count indicative of wheel signal cycles;

gating means for selectively enabling and disabling the first and second counter means, said gating means responsive both to a control signal and to the phase angle of the wheel signal, such that, when the control signal is in a first state, the first and second counter means are consistently enabled at a predetermined phase angle of the wheel signal and, when the control signal is in a second state, the first and second counter means are consistently disabled at the same predetermined phase angle of the wheel signal;

computer means, coupled to the first and second counter means and to the gating means, for generating the control signal to selectively control the gating means;

means, included in the computer means, for reading and storing the counts stored in the first and second counter means at a first time;

means, included in the computer means, for placing the control signal in the first state at a second time, subsequent to the first time, to cause the gating means to enable the first and second counter means at the next occurrence of the predetermined phase angle of the wheel signal;

means, included in the computer means, for placing the control signal in the second state at a third time, subsequent to the second time, to cause the gating means to disable the first and second counter means at the next occurrence of the predetermined phase angle of the wheel signal;

means, included in the computer means, for determining whether the first and second counter means have been disabled;

means, included in the computer means, for reading and storing the counts stored in the first and second counter means at a fourth time, subsequent to the third time and after the determining means has determined that the first and second counter means have been disabled;

means, included in the computer means, for calculating the difference between the count stored in the first counter means at the first and fourth times as a measure of elapsed time; and

means, included in the computer means, for calculating the difference between the count stored in the second counter means at the first and fourth times as a measure of the number of wheel signal cycles occurring during the elapsed time.

5. The invention of claim 4 wherein the gating means comprises:

a flip-flop having a data input terminal coupled to the computer means for receiving the control signal, a clock input terminal coupled to the wheel signal generating means, and an output terminal, said flip-flop operating to generate a gating signal on the output terminal;

a first gate having an input terminal coupled to the clock means, an output terminal coupled to the first counter means, and a gating terminal coupled to the output terminal of the flip-flop, said first gate operating to selectively gate the clock signal in response to the gating signal generated by the flip-flop;

a second gate having an input terminal coupled to the wheel signal generating means, an output terminal coupled to the second counter means, and a gating terminal coupled to the output terminal of the flip-flop, said second gate operative to selectively gate the wheel signal in response to the gating signal generated by the flip-flop.

7. The invention of claim 5 wherein the determining means comprises:

means for applying the gating signal to the computer means; and

means, included in the computer means, for sensing the gating signal to determine whether the first and second counter means have been disabled.

8. In a brake control system including a rotatable wheel and means, responsive to the wheel, for generating a periodic wheel signal having a frequency indicative of the rotational behavior of the wheel, an apparatus for precisely measuring the time duration of one or more cycles of the wheel signal comprising:

clock means for generating a periodic clock signal;

first counter means for maintaining a count indicative of clock signal cycles;

second counter means for maintaining a count indicative of wheel signal cycles;

gating means for selectively enabling and disabling the first counter means, said gating means responsive to the phase of the wheel signal such that the first counter means is consistently enabled and disabled at substantially the same phase angle of the wheel signal;

computer means for controlling the gating means first to enable the first counter means and then, after a period of time, to disable the first counter means;

means, included in the computer means, for determining whether the first counter means has been disabled; and

means, included in the computer means, for reading and storing the counts stored in the first and second counter means after the first counter means has been disabled.

9. The invention of claim 8 wherein the gating means comprises:

a flip-flop having a data input terminal coupled to an output port of the computer means, a clock input terminal coupled to the wheel signal generating means, and an output terminal, said flip-flop operating to generate a gating signal on the output terminal;

a first gate having an input terminal coupled to the clock means, an output terminal coupled to the first counter means, and a gating terminal coupled to the output terminal of the flip-flop, said first gate operating to selectively gate the clock signal in response to the gating signal generated by the flip-flop;

a second gate having an input terminal coupled to the wheel signal generating means, an output terminal coupled to the second counter means, and a gating terminal coupled to the output terminal of the flip-flop, said second gate operating to selectively gate the wheel signal in response to the gating signal generated by the flip-flop.

10. The invention of claim 9 wherein the determining means comprises:

means for applying the gating signal to the computer means; and

means, included in the computer means, for sensing the gating signal to determine whether the first and second counter means have been disabled.