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Integrated circuit incorporating low voltage and high voltage semiconductor devices

  • US 4,412,142 A
  • Filed: 12/24/1980
  • Issued: 10/25/1983
  • Est. Priority Date: 12/24/1980
  • Status: Expired due to Term
First Claim
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1. An integrated circuit comprising:

  • A. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region;

    B. low voltage control logic including a first, vertical, transistor comprising;

    (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact,(2) a first base of a second conductivity type, disposed upon said first emitter to form a junction therewith,and(3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith;

    C. a second, lateral, transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising;

    (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor,(2) a second base of said first conductivity type defined in said second region and in electrical connection with said contact, laterally adjacent to said second emitter to form a junction therewith, and(3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith, and formed deeply beneath the upper surface of said substrate so as to provide improved high voltage performance and a guard ring between said high voltage power transistor means and said low voltage control logic;

    andD. power transistor means of high voltage design including a third, vertical power transistor, comprising;

    (1) a third, underlying collector defined in said second region and electrically connected to said contact,(2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, shielded from said low voltage control logic by said guard ring, and electrically connected thereto, and(3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said third base to form a junction therewith.

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