Integrated circuit incorporating low voltage and high voltage semiconductor devices
First Claim
1. An integrated circuit comprising:
- A. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region;
B. low voltage control logic including a first, vertical, transistor comprising;
(1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact,(2) a first base of a second conductivity type, disposed upon said first emitter to form a junction therewith,and(3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith;
C. a second, lateral, transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising;
(1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor,(2) a second base of said first conductivity type defined in said second region and in electrical connection with said contact, laterally adjacent to said second emitter to form a junction therewith, and(3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith, and formed deeply beneath the upper surface of said substrate so as to provide improved high voltage performance and a guard ring between said high voltage power transistor means and said low voltage control logic;
andD. power transistor means of high voltage design including a third, vertical power transistor, comprising;
(1) a third, underlying collector defined in said second region and electrically connected to said contact,(2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, shielded from said low voltage control logic by said guard ring, and electrically connected thereto, and(3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said third base to form a junction therewith.
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Accused Products
Abstract
An integrated circuit incorporating high voltage semiconductor devices which are controlled by low voltage semiconductor devices is disclosed, including a method for making the same. The low voltage devices which are capable of realizing complex logic functions on the same chip are realized with only one simple extra step in the fabrication process as compared with the process used to fabricate discrete high voltage power transistors. The process addition to implant the low voltage device does not significantly degrade the original capability associated with discrete power transistors. Both laterally developed and vertically developed devices are described. The integrated circuit combines I2 L logic with power Darlington transistors. A large area ion implantation permits one to fabricate both low and high voltage devices on one substrate. The resulting integrated circuit permits a plurality of loads to be controlled by a simple or complex control function.
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Citations
14 Claims
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1. An integrated circuit comprising:
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A. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region; B. low voltage control logic including a first, vertical, transistor comprising; (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact, (2) a first base of a second conductivity type, disposed upon said first emitter to form a junction therewith, and (3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith; C. a second, lateral, transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising; (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor, (2) a second base of said first conductivity type defined in said second region and in electrical connection with said contact, laterally adjacent to said second emitter to form a junction therewith, and (3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith, and formed deeply beneath the upper surface of said substrate so as to provide improved high voltage performance and a guard ring between said high voltage power transistor means and said low voltage control logic; and D. power transistor means of high voltage design including a third, vertical power transistor, comprising; (1) a third, underlying collector defined in said second region and electrically connected to said contact, (2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, shielded from said low voltage control logic by said guard ring, and electrically connected thereto, and (3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said third base to form a junction therewith. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An integrated circuit comprising:
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A. first and second terminal means upon said integrated circuit for connection to the respective terminals of a relatively high voltage unidirectional voltage source; B. a monolithic substrate having an underlying highly doped first region of a first conductivity type, a contact on the undersurface thereof, and a second moderately doped region of said first conductivity type overlaying said first region; C. low voltage control logic including a first, vertical control transistor comprising; (1) a first underlying emitter of said first conductivity type defined in said second region, and electrically connected to said contact, (2) a first base of said second conductivity type, disposed upon said first emitter to form a junction therewith, and (3) a first collector of said first conductivity type, disposed upon and horizontally bounded by said second base to form a junction therewith; D. a second lateral transistor of high voltage design for coupling said low voltage control logic to high voltage power transistor means, comprising; (1) a second emitter of said second conductivity type, disposed upon said second region, and coupled to the collector of said first transistor, (2) a second base of said first conductivity type defined in said second region and electrically connected to said contact, laterally adjacent to said third emitter to form a junction therewith, and (3) a second collector of said second conductivity type disposed upon said second region, laterally adjacent to said second base to form a junction therewith; and E. power transistor means of high voltage design including a first, vertical power transistor, comprising; (1) a third underlying collector defined in said second region and electrically connected to said contact, (2) a third base of said second conductivity type, disposed upon said third collector to form a junction therewith, and coupled to said second collector, and (3) a third emitter of said first conductivity type, disposed upon and horizontally bounded by said first base to form a junction therewith, said emitter being connected to said second terminal means; and F. current supply means comprising; (1) a first diode region of said first conductivity type electrically connected to said contact, (2) a second diode region of said second conductivity type electrically connected to said first terminal means and forming a junction with said first diode region, the current capacity of said current supply means via said contact being equal to the current requirement of said power transistor means to permit serial energization thereof by said unidirectional source, the voltage drop established by said diode when so energized establishing a sufficiently stable low voltage irrespective of large variations of the potential of said external source, suitable for energization of said low voltage control logic. - View Dependent Claims (12, 13, 14)
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Specification