Programmable signal amplitude control circuits

• US 4,414,501 A
• Filed: 05/26/1981
• Issued: 11/08/1983
• Est. Priority Date: 05/26/1981
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Eichelberger, Charles W., Nati, Salvatore F. Jr., Bedard, James F.
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US06/267,274
• Time in Patent Office: 896 Days
• Field of Search: 323/280, 323/281, 323/352-354, 323/297, 323/298, 363/16, 363/78, 363/79
• US Class Current: 323/280
• CPC Class Codes: G08C 19/025 using fixed values of magnitude of current or voltage
• CPC Class Codes: H03G 3/001 Digital control of analog signals

Abstract

A circuit, for providing a periodic signal of programmably controllable amplitude, includes an oscillator having a substantially constant amplitude signal of desired frequency and waveform at an output thereof connected to the input of a first programmable voltage divider having its output connected to one input of an operational amplifier. The remaining operational amplifier input is connected to the output thereof via a second programmable voltage divider used as a programmably controllable feedback network. The operational amplifier output signal amplitude may be controlled by external data signals to values less than, equal to, and greater than, the substantially constant oscillator waveform amplitude. Both computer and hard-wired circuitry for controlling the output signal are disclosed. An isolation-and-rectification network may be used to recover a D.C. voltage of programmably controlled amplitude.

Claims

1. A circuit for providing an output signal of controllable amplitude responsive to the data contained in at least one externally-provided digital control signal, comprising:

oscillator means for providing a periodic waveform having a selected frequency and a substantially constant amplitude;

an operational amplifier having an inverting input, a non-inverting input and an output;

first voltage divider means for providing the output waveform of said oscillator means to a selected one of said operational amplifier inverting and non-inverting inputs with an amplitude selected from a first plurality of selectable values, each less than the substantially constant amplitude of the oscillator means output waveform;

second voltage divider means coupled to at least said operational amplifier output and a remaining one of said inverting and non-inverting inputs, for controlling the gain of said operational amplifier to said signal from said first voltage divider means, to a selected one of a second plurality of selectable values;

means coupled to at least one of said first and second voltage divider means for controllably switching the values thereof responsive to said at least one control signal; and

a circuit output terminal coupled to said operational amplifier output, at which appears said circuit output signal with the frequency of said oscillator means output waveform and an amplitude controlled by the selected one of the first and second voltage divider means values.

2. The circuit of claim 1, further including means coupled to said circuit output terminal for recovering a D.C. level responsive to the magnitude of the A.C. waveform at said operational amplifier output.

3. The circuit of claim 2, wherein said D.C. recovering means includes means for rectifying the A.C. waveform;

and means for filtering the rectified waveform to obtain a D.C. value.

4. The circuit of claim 3, wherein said rectifying means comprises a unidirectionally-conducting element;

and said filtering means comprises a capacitance paralleled by a load resistance.

5. The circuit of claim 2, further comprising means coupled between said operational amplifier output and said D.C. recovering means for isolating the recovery means from said operational amplifier.

6. The circuit of claim 5, wherein said isolating means is a transformer having a primary winding receiving the waveform at the operational amplifier output and having a secondary winding coupled to said recovery means.

7. The circuit of claim 5, further comprising a transmission medium coupled between said operational amplifier output and said isolating means.

8. The circuit of claim 1, wherein said operational amplifier comprises a differential amplifier having a non-inverting input coupled to the non-inverting input of said operational amplifier, an inverting input coupled to the inverting input of said operational amplifier, and an output;

first and second complementary symmetry transistors, each having an emitter electrode coupled to said operational amplifier output, each having a control electrode connected together and coupled to the output of said differential amplifier, and each having a collector electrode; and

means for providing a source of operating potential with respect to electrical ground potential, said operating potential means coupled between the collector electrodes of said first and second transistors.

9. The circuit of claim 1, wherein said first voltage divider means comprises a first fixed resistance element coupled between said oscillator means and said selected one of said operational amplifier inputs;

and a first step-wise-variable resistance network coupled in shunt between a fixed potential and the junction between said first resistance element and said operational amplifier; and

said controllably switching means includes first means connected to said first resistance network to controllably vary the resistance thereof to vary the magnitude of the signal at said selected operational amplifier input in accordance with the digital data of an associated one of said at least one externally provided control signal.

10. The circuit of claim 9, wherein said first resistance network comprises a second fixed resistance element coupled between said fixed potential and said junction;

and a plurality of shunt resistance elements, each having a first terminal thereof connected to one of said junction and said fixed potential, and a second terminal; and

said first means comprises a like plurality of means for switching said second terminal of an associated one of said plurality of resistance element selectably to the remaining one of said fixed potential and said junction responsive to the digital data of the associated one of said at least one control signals.

11. The circuit of claim 10, wherein said second voltage divider means comprises a second step-wise-variable resistance network coupled between said operational amplifier output and said remaining one of said operational amplifier inputs;

a third step-wise-variable resistance network coupled between another fixed potential and said remaining operational amplifier input; and

said controllably switching means includes second and third means respectively connected to said second and third resistance networks for controllably varying the resistances thereof to vary the magnitude of the signal at said operational amplifier output, in accordance with the digital data of associated ones of said at least one externally-provided control signals.

12. The circuit of claim 11, wherein said second resistance network comprises another plurality of resistance elements, each having a first terminal thereof connected to one of said operational amplifier output and remaining input terminals, and a second terminal;

and said second means includes a like plurality of means each for switching said second terminal of said plurality of second resistance network resistance elements selectably to the remaining one of said operational amplifier output and remaining input for controllably coupling the associated resistance element therebetween responsive to the digital data of an associated one of said control signals.

13. The circuit of claim 12, further comprising another fixed resistance element connected between said operational amplifier remaining input and said output, in parallel with said second resistance network, for establishing a maximum resistance value of said second resistance network.

14. The circuit of claim 11, wherein said third resistance network comprises yet another plurality of fixed resistance elements, each having a first terminal connected to one of said remaining operational input and another fixed potential, and a second terminal;

and said third means comprises a like plurality of means each for switching said second terminal of an associated one of said yet another plurality of resistance elements selectably to the remaining one of another fixed potential and said remaining input responsive to the digital data of associated one of the control signals.

15. The circuit of claim 14, wherein at least one of the switching means of said first, second, and third means are adapted for manually control to set a maximum or minimum circuit output amplitude.