Digital m of n correlation device having increased bit rate
First Claim
1. A digital correlation device for producing a voltage sum corresponding to n individual analog currents in accordance with the bits in corresponding bit positions, the n individual analog currents being indicative of the number of agreements/disagreements in the corresponding bit positions, which comprises:
- a signal shift register including a plurality of signal multivibrators S1 -Sn arranged in a predetermined manner so as to store a binary sequence of signal data inputted at a signal input line of said signal shift register;
a reference shift register including a plurality of reference multivibrators R1 -Rn arranged in a predetermined manner so as to store a binary sequence of reference data inputted thereto;
a clock having one output operatively connected to said signal shift register and another output operatively connected to said reference shift register for shifting the states of the signal multivibrators S1 -Sn and the reference multivibrators R1 -Rn according to the modulation frequency of the signal data;
a plurality of modulo 2 adders A1 -An operatively connected at each of their two inputs to the outputs of corresponding signal multivibrators S1 -Sn of said signal shift register and reference multivibrators R1 -Rn of said reference shift register for modulo 2 summing of the two bits in corresponding bit positions of said signal and said reference shift registers to provide a single bit representation of the agreements/disagreements in the corresponding bit positions; and
a plurality of 1-bit digital-to-analog converters C1 -Cn operatively connected at one input to the corresponding output of each of said plurality of modulo 2 adders and at their outputs collectively to one end of a single analog summing resistor, the other end of said single analog summing resistor being connected to a voltage supply, said single summing resistor being an integral part of each one of said plurality of 1-bit digital-to-analog converters C1 -Cn so that they operate to convert the single bit representative of the agreements/disagreements of the n individual analog currents into the voltage sum.
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Abstract
A digital m of n correlation device using signal and reference shaft registers, modulo 2 adders, unique 1-bit D/A converters, and single resistor analog summing provides a very fast correlation product for pulse compression modulations such as phase or frequency shift keying. The compression ratio for the digital m of n correlation device, according to the present invention, is 168:1 (equal to the number of bits). The device is capable of bit rates in excess of 100 Mbps and is well suited for LSI fabrication.
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Citations
13 Claims
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1. A digital correlation device for producing a voltage sum corresponding to n individual analog currents in accordance with the bits in corresponding bit positions, the n individual analog currents being indicative of the number of agreements/disagreements in the corresponding bit positions, which comprises:
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a signal shift register including a plurality of signal multivibrators S1 -Sn arranged in a predetermined manner so as to store a binary sequence of signal data inputted at a signal input line of said signal shift register; a reference shift register including a plurality of reference multivibrators R1 -Rn arranged in a predetermined manner so as to store a binary sequence of reference data inputted thereto; a clock having one output operatively connected to said signal shift register and another output operatively connected to said reference shift register for shifting the states of the signal multivibrators S1 -Sn and the reference multivibrators R1 -Rn according to the modulation frequency of the signal data; a plurality of modulo 2 adders A1 -An operatively connected at each of their two inputs to the outputs of corresponding signal multivibrators S1 -Sn of said signal shift register and reference multivibrators R1 -Rn of said reference shift register for modulo 2 summing of the two bits in corresponding bit positions of said signal and said reference shift registers to provide a single bit representation of the agreements/disagreements in the corresponding bit positions; and a plurality of 1-bit digital-to-analog converters C1 -Cn operatively connected at one input to the corresponding output of each of said plurality of modulo 2 adders and at their outputs collectively to one end of a single analog summing resistor, the other end of said single analog summing resistor being connected to a voltage supply, said single summing resistor being an integral part of each one of said plurality of 1-bit digital-to-analog converters C1 -Cn so that they operate to convert the single bit representative of the agreements/disagreements of the n individual analog currents into the voltage sum. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A digital m of n correlation device for producing a digital indication at its output of whether or not the number of agreements in corresponding bit positions equals or exceeds the number m, and wherein n is the number of possible agreements, which comprises:
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a signal shift register including a plurality of signal multivibrators S1 -Sn arranged in a predetermined manner so as to store a binary sequence of signal data inputted at a signal input line of said signal shift register; a reference shift register including a plurality of reference multivibrators R1 -Rn arranged in a predetermined manner so as to store a binary sequence of reference data inputted thereto; a clock having one output operatively connected to said signal shift register and another output operatively connected to said reference shift register for shifting the states of the signal multivibrators S1 -Sn and the reference multivibrators R1 -Rn according to the modulation frequency of the signal data; a plurality of modulo 2 adders A1 -An operatively connected at each of their two inputs to the outputs of corresponding signal multivibrators S1 -Sn of said signal shift register and reference multivibrators R1 -Rn of said reference shift register for modulo 2 summing of the two bits in corresponding bits positions of said signal and said reference shift registers to provide a single bit representation of the agreements/disagreements in the corresponding bit positions; a plurality of 1-bit digital-to-analog converters C1 -Cn operatively connected at one input to the corresponding output of each of said plurality of modulo 2 adders and at their outputs collectively to one end of a single analog summing resistor, the other end of said single analog summing resistor being connected to a voltage supply, said single analog summing resistor being an integral part of each one of said plurality of 1-bit digital-to-analog converters C1 -Cn so that they operate to convert the single bit representative of the agreements/disagreements of n individual analog currents into a voltage sum; an analog comparator for comparing the voltage sum from said single analog summing resistor, connected at one input thereof with a threshold voltage, as determined by the threshold number m, connected at the other input thereof; and a n-bit digital-to-analog converter for establishing the threshold voltage, operatively connected to the other input of said analog comparator, and having its input connected to a threshold data bus, such that the output of said analog comparator is the digital indication of whether or not the total number of agreements between the bit positions in said signal shift register and said reference shift register exceed the threshold voltage as established by said n-bit digital-to-analog converter. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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Specification