Fully parallel threshold type analog-to-digital converter

• US 4,417,233 A
• Filed: 02/22/1980
• Issued: 11/22/1983
• Est. Priority Date: 02/28/1979
• Status: Expired due to Term

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Inoue, Michihiro, Takemoto, Toyoki, Yamada, Haruyasu
• Primary Examiner(s): Sloyan, T. J.
• Application Number:
  US06/123,646
• Time in Patent Office: 1,369 Days
• Field of Search: 340/347 AD, 340/347 M, 340/347 CC, 324/99 D, 370/7, 364/707, 318/594
• US Class Current: 341/156
• CPC Class Codes: H03M 1/361 having a separate comparator and reference value for each quantisation level, i.e. full flash converter type

Abstract

A parallel type A/D converter capable of operating at an extremely high speed with a high degree of accuracy and with low power consumption. A plurality of comparators each having a reference voltage corresponding to an assigned quantizing level are disposed in parallel with each other and divided into a plurality of comparator blocks or groups. A plurality of sub-comparators are provided so that prior to the comparison of the input signal by the comparators, the input signal is first compared with the reference voltages of the sub-comparators and in response to the output from the sub-comparator having the reference voltage comparable or corresponding to the incoming input signal, only the comparators in the comparator block or group associated with said sub-comparator are energized or enabled while the remaining comparators are kept de-energized or disabled, whereby a minimum power consumption may be attained.

Claims

1. A fully parallel threshold type A/D converter for an input signal having a predetermined voltage range, comprising:

A plurality of comparators each of which has a fixed reference voltage corresponding to a quantizing level and which are disposed in parallel with each other, said comparators being divided into a plurality of blocks; and

a sub comparator operatively associated with each of said comparator blocks, whereby the input signal is first compared by the sub-comparators and then compared by the comparators in one comparator block selected and supplied with power in response to the output from the associated sub-comparator,

said reference voltages encompassing the full range of said input signal and remaining unchanged during the operation of both the sub-comparators and the comparators of said converter.

2. A parallel threshold type A/D converter as set forth in claim 1 wherein during the holding period of the comparators,

the comparison by the sub-comparators for the next conversion cycle and the switching of operating current of said comparators are carried out;

and

the comparison by the sub-comparators is started immediately after the holding is started and after a predetermined time delay said switching is started.

3. A fully parallel threshold type A/D converter for an input signal having a predetermined voltage range, comprising:

a plurality of comparators each of which has a fixed reference voltage corresponding to a quantizing level and which are disposed in parallel with each other, said comparators being divided into a plurality of blocks, the relative numbers of comparators in said blocks being weighted in a ratio corresponding to the variations in level of a sinusoidal signal wave within the corresponding intervals; and

a sub-comparator operatively associated with each of said comparator blocks, whereby the input signal is first compared by the sub-comparators and then compared by the comparators in one comparator block selected and supplied with power in response to the output from the associated sub-comparator,

said reference voltages encompassing the full range of said input signal and remaining unchanged during the operation of both the sub-comparators and the comparators of said converter.

4. A fully parallel threshold type analog-to-digital converter for an input signal having a predetermined voltage range, comprising:

a plurality of comparators connected in parallel;

means for supplying each comparator with a different fixed quantizing level reference voltage and an analog input signal to be compared therewith, said reference voltages spanning the range of anticipated values of said input signal in a number of groups, each group of reference voltages being associated with a corresponding block of comparators;

at least three sub-comparators connected in parallel with said comparators, the number of sub-comparators being at least equal to the number of comparator blocks minus one;

means for supplying each sub-comparator with a different fixed quantizing level reference voltage and said input signal to be compared therewith, the reference voltage supplied to each sub-comparator corresponding to the reference voltage applied to a comparator at an extreme of a corresponding block, so that the outputs of said sub-comparators uniquely define the particular block including a comparator with a reference voltage corresponding to the value of the input signal;

said reference voltages encompassing the full range of said input signal and remaining unchanged during the operation of both the sub-comparators and the comparators of said converter;

means responsive to the outputs of said sub-comparators for supplying power to the comparators of said particular block; and

logic and encoding means responsive to the comparator outputs for providing a digital code signal having a value corresponding to the value of said analog input signal.