Apparatus and method for selectively activating plural electrical loads at predetermined relative times

• US 4,419,933 A
• Filed: 10/01/1981
• Issued: 12/13/1983
• Est. Priority Date: 02/01/1978
• Status: Expired due to Term

• Current Assignee: Orica Trading Pty., Limited (Orica Limited)
• Original Assignee: Imperial Chemical Industries Limited (Nouryon BV)
• Inventors: Kirby, Ian J., Stratton, Andrew, Mitchell, Michael I.
• Primary Examiner(s): Jordan, Charles T.
• Application Number:
  US06/307,633
• Time in Patent Office: 803 Days
• Field of Search: 102/206, 102/215, 102/217, 102/311, 361/248, 361/249, 361/251
• US Class Current: 102/206
• CPC Class Codes: F42B 3/122 Programmable electronic delay initiators
• CPC Class Codes: F42D 1/055 specially adapted for firing multiple charges with a time delay
• CPC Class Codes: G01V 1/08 involving time-delay devices
• CPC Class Codes: G04F 1/005 using electronic timing, e.g. counting means pulse time delay arrangements H03K5/13; modifications of electronic switches for introducing a time delay before switching H03K17/28
• CPC Class Codes: H03K 5/131 Digitally controlled

Abstract

Separate electrical timing and load activation devices are provided for each of plural electrical loads and each device is connected to receive reference timing signals from a central unit. Each of the separate timing and load activation devices measures a reference time interval accurately defined by the reference timing signals and subsequently activates its associated electrical load after a respectively corresponding predetermined time delay which is determined as a function of the locally measured reference time interval.

Claims

1. A system for energizing a series of electrical loads in predetermined timed sequence after a starting signal, which system comprises:

a supply of electrical energy,

means to generate a train of accurately timed control signals, and

a time control switching circuit for each load for connecting said supply to the corresponding load at a desired time, each of said switching circuits comprising;

means to receive said train of control signals,

a preset signal selecting system having means to select a first and a second of said control signals and to generate first and second timing signals in response to said first and second control signals respectively,

means to generate a starting signal, and

timing means to measure the interval between said first and second timing signals by counting locally generated timing pulses and to generate an output signal whereby the corresponding load is connected to an energy supply at a time interval after the starting signal determined by the interval between the first and second timing signals.

2. A system as in claim 1 wherein each load is an electric fusehead and each time control switching circuit is located with a corresponding fusehead in a detonator casing containing explosive charges.

3. A system as in claim 2 including an energy storage capacitor in each casing to store sufficient energy to operate the switching circuit and fire the fusehead even if the external connections to the fusehead are disconnected after the starting signal.

4. A system as in claim 1 including in each time control switching circuit signal discriminator means to identify duration of frequency characteristics of the control signals whereby only signals having selected duration or frequency characteristics will be passed for use by the switching circuit.

5. A system as in claim 1 wherein each time control switching circuit includes:

means to separate or derive control signals from the energy supply,

means to preset the correct starting conditions for the switching circuit, and

means to protect the switching circuit from damage by excess voltage.

6. A system as in claim 1 wherein said preset signal selecting system comprises:

an electronic digital counter having logic elements whereby the state of the logic elements represents the count of control signals and the first and second timing signals are generated by the attainment of predetermined logic states.

7. A system as in claim 6 wherein said logic elements comprises:

a first set of logic gates connected to said digital counter and which, on the count of the first predetermined number, generates the first timing signal, and

a second set of logic gates connected to said digital counter and which, on the count of the second predetermined number, generates the second timing signal.

8. A system as in claim 6 wherein said logic elements comprise:

a first logic register having said first predetermined number premanently set thereinto, and

a first logic comparator for comparing the contents of the counter compared with the state of the first logic register thereby generating a first timing signal when the counter contents and the state of the first logic register are identical,

a second register having said second predetermined number permanently set thereinto, and

a second logic comparator which generates the second timing signal at the count of the second predetermined number.

9. A system as in claim 1 wherein each of said timing means comprises:

a clock pulse generator containing an oscillator, and

a reversible electronic digital counter connected to receive clock pulses from said clock pulse generator.

10. A system as in claim 9 wherein the signal selecting system and reversible counter operate in response to the first selected control signal to feed the first timing signal to the reversible counter which then starts a count of clock pulses in one direction and, in response to the second selected control signal to feed the second timing signal to stop the reversible counter.

11. A system as in claim 1 wherein the second timing signal generates a substantially coincident starting signal.

12. A system as in claim 1 wherein the second timing signal starts a delay counter which counts a predetermined number of control signals after the control signal which generates the second timing signal and thereupon generates the starting signal.

13. A system as in claim 10 wherein said starting signal initiates a reverse count of clock pulses on the reversible counter and, when the reverse count returns to the starting count, an energizing signal is produced which causes the load to be energized.