Environmental thermostat assembly

• US 4,428,528 A
• Filed: 11/04/1982
• Issued: 01/31/1984
• Est. Priority Date: 11/12/1981
• Status: Expired due to Fees

• Current Assignee: Delta Dore, Co.
• Original Assignee: Delta Dore, Co.
• Inventors: Renault, Joel E.
• Primary Examiner(s): Wayner, W. E.
• Application Number:
  US06/439,111
• Time in Patent Office: 453 Days
• Field of Search: 236/46 R, 236/47, 165/12, 364/557, 364/569, 340/309.1
• US Class Current: 236/46.00R
• CPC Class Codes: G04G 15/006 for operating at a number of different times cigar or cigarette receptacles or boxes with means for limiting the frequency of smoking A24F15/005
• CPC Class Codes: G05D 23/1904 variable in time
• CPC Class Codes: G05D 23/24 the sensing element having a resistance varying with temperature, e.g. a thermistor

Abstract

A programmable thermostat has an associated electronic control circuit. There is a coding matrix and a multiplicity of programs which may be selected via the matrix. The user may select two set points to cause two programs to work in an interrelated manner, one for high heat requirements and one for low heat requirements. A clock may call in the two programs in any pre-selected manner such as: high heat in the morning, low heat as soon as the house has heated, high heat in the evening when the outside temperature falls, and low heat at night.

Claims

1. An environment thermostat assembly with a daily programming device, comprising a thermostat, a digital clock with a seven segment display device, a programming selecting circuit with two temperature reference values, a reference value switching device, and a control circuit for controlling the switching circuit, said control circuit being monitored by the digital output signal of the digital clock and by the program selecting circuit, wherein the control circuit comprises a digital/decimal converter for converting the hour unit digital data into a one out of ten code signal, the ten outputs of the converter (N/D) being connected to the vertical wires of a cross-point matrix having three pair of output wires, the output pairs being respectively assigned to the hours of which the tenth figure is 2, 1 and 0, said output wires being connected to the corresponding input of a logical circuit which has also a number of inputs connected to the active outputs of the clock when the hour tenth figures is 1 or 2, respectively, some cross-points of the matrix being selectively connected in accordance with the different predetermined programs, electronic contacts being mounted on the output wires of the matrix and controlled by the program selecting circuit, the output of the logical circuit being connected to a reference value adjusting potentiometer, the voltage transmitted to said potentiometer through the output of the logical circuit varying between two values in accordance with the logical levels of the outputs of the logical circuit.

2. A thermostat assembly as defined in claim 1, wherein the program selecting circuit has a number of outputs directly connected to the logical circuit, in order to bring the output potential of said logical circuit at a value or another one, whatever be the time.

3. A thermostat assembly as defined in claim 1, wherein the thermostat comprises a bistable relay, means for energizing the coil of said relay in one direction or the other during the successives changes of state of the output signal of the temperature sensor of the thermostat, one of the contacts of said relay closing or opening the output circuit of the thermostat, and means for de-energizing the coil between the changes of state of said output signal.

4. A thermostat assembly as defined in claim 3, wherein the output of the temperature sensor, which is at high level for a heat demand and at a low level in the other case, is connected to the first two inputs of first and second NAND gates directly and through an inverter, the second inputs of said first and second NAND gates being respectively connected to the stationnary make contact and the stationnary rest contact of a second contact of the coil of which the moving contact is at low level, the outputs of the first and second NAND gates being respectively connected to the control inputs of a first and a second electronic contacts, the first electronic contact being mounted between the positive terminal of a first cell and the first terminal of the coil of which the second terminal is connected to the negative terminal of said first cell, and the second electronic contact being mounted between the negative terminal and the second cell and the first terminal of the coil of which the second terminal is connected to the positive terminal of the second cell, the first contact being open when at rest position.

5. A thermostat assembly as defined in claim 4, wherein a delay circuit is mounted between the second input of the first NAND gate and the corresponding stationnary contact of the second contact.

6. A thermostat assembly as defined in claims 1 to 5, wherein the digital clock is fed by the cell source.

7. A thermostat assembly as defined in claims 1 to 5 wherein an inverter is mounted between the back panel output terminal of the clock and the corresponding input terminal of the display device, the other input terminal of said inverter being connected to the blinking output of the clock digital circuit, said inverter being controlled by a circuit which measures the voltage of the cell source and which switches said blinking terminal to the back panel signal input of the display device when said voltage falls below a predetermined value.

8. A thermostat assembly as defined in claim 2, wherein the thermostat comprises a bistable relay, means for energizing the coil of said relay in one direction or the other during the successive changes of state of the output signal of the temperature sensor of the thermostat, one of the contacts of said relay closing or opening the output circuit of the thermostat, and means for de-energizing the coil between the changes of state of said output signal.

9. A thermostat assembly as defined in claim 6, wherein an inverter is mounted between the back panel output terminal of the clock and the corresponding input terminal of the display device, the other input terminal of said inverter being connected to the blinking output of the clock digital circuit, said inverter being controlled by a circuit which measures the voltage of the cell source and which switches said blinking terminal to the back panel signal input of the display device when said voltage falls below a predetermined value.