Electrical filter circuit operated with a definite sampling and clock frequency f.sub.T which consists of CTD elements
First Claim
1. In an electrical filter circuit for use with a frequency translation system, a plurality of CTD lines, each of said lines having a plurality of charge storage cells, a pulse generator operating at a clock frequency fT for supplying inputs to said storage cells for moving charges therethrough, one of said CTD lines being connected in a closed loop to form a resonator, and means interconnecting said CTD lines to give each of said CTD lines a unidirectional transmission behavior, said clock frequency fT being selected so that the frequency to be filtered out by said filter circuit lies between fT /2 and 3fT /2, and the frequency to be filtered out is translated to a frequency lying below fT /2.
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Accused Products
Abstract
The invention relates to an electrical filter circuit operated with a definite sampling and clock frequency fT, such filter being made up of CTD elements, and having at least one bipolar or quadripolar resonator in the form of a self-contained conductor loop (for example, C1, C2) with unidirectional transmission behavior.
Differences in the transfer capacitances of such circuits are reduced, as far as possible, in order to thereby simplify integrated manufacture as far as possible, by positioning the frequency band to be filtered out at a frequency position which lies above half the clock frequency (fT /2), or in the range from fT /2 through 3fT /2.
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Citations
1 Claim
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1. In an electrical filter circuit for use with a frequency translation system, a plurality of CTD lines, each of said lines having a plurality of charge storage cells, a pulse generator operating at a clock frequency fT for supplying inputs to said storage cells for moving charges therethrough, one of said CTD lines being connected in a closed loop to form a resonator, and means interconnecting said CTD lines to give each of said CTD lines a unidirectional transmission behavior, said clock frequency fT being selected so that the frequency to be filtered out by said filter circuit lies between fT /2 and 3fT /2, and the frequency to be filtered out is translated to a frequency lying below fT /2.
Specification