Combination matrix array display and memory system

• US 4,430,648 A
• Filed: 01/12/1981
• Issued: 02/07/1984
• Est. Priority Date: 01/22/1980
• Status: Expired due to Term

• Current Assignee: Citizen Watch Co Limited (Citizen Electronics Company Limited)
• Original Assignee: Citizen Watch Co Limited (Citizen Electronics Company Limited)
• Inventors: Togashi, Seigo, Tsuzuki, Akira
• Primary Examiner(s): Curtis, Marshall M.
• Application Number:
  US06/224,600
• Time in Patent Office: 1,121 Days
• Field of Search: 340/706, 340/707, 340/708, 340/798, 340/799, 340/802, 340/811, 340/718, 340/719, 340/784, 340/785, 340/814
• US Class Current: 345/205
• CPC Class Codes: G06F 3/0412 Digitisers structurally integrated in a display
• CPC Class Codes: G09G 3/3618 with automatic refresh of the display panel using sense/write circuits
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G11C 11/409 Read-write [R-W] circuits

Abstract

A display device of solid-state matrix type, such as a liquid crystal display device, retains display data for an unlimited period after such data has been written into the display, with no need for periodic re-writing of the display data to compensate for deterioration due to leakage effects. In addition, the display data can be read out again, if required, so that the display device can also be used as a memory. such a display device can also be utilized to perform data input, by writing in of data through application of light to the display surface, such as by using a light pen.

Claims

1. A matrix array display and memory system, comprising:

a display panel comprising a set of row electrodes and a set of column electrodes, a plurality of switching elements each disposed at a respective intersection of said row and column electrodes and being coupled to one of said row electrodes and responsive to signals applied to said one of the row electrodes for selective switching to a conductive and a non-conductive state, and a plurality of display elements each coupled through a corresponding one of said switching elements to one of said column electrodes, each of said display elements having a predetermined amount of capacitance and being selectively settable to a first display state in which said capacitance is in a charged condition and a second display state in which said capacitance is in a discharged condition;

row drive circuit means coupled to said row electrodes for generating row drive signals to successively set rows of said switching elements into the conductive state during periodically repeated sense/refresh intervals, to thereby successively and periodically couple rows of said display elements to said column electrodes;

distribution circuit means coupled to said column electrodes for applying signals representing digital data thereto, for thereby selectively charging the capacitances of said display elements coupled to said column electrodes, to thereby simultaneously display and memorize said digital data by said display elements;

a plurality of sense/refresh circuits each coupled to a corresponding one of said column electrodes, each of said sense/refresh circuits acting during each of said sense/refresh intervals to first sense a potential appearing upon the corresponding column electrode representing the charge condition of one of said display elements, to then produce an output potential in accordance with said sensed potential, and to thereby drive said one of the display elements to said output potential;

said sense/refresh circuits thereby acting during said sense/refresh intervals to periodically refresh said digital data memorized in said display elements.

2. A matrix display panel and memory system according to claim 1, in which each of said sense/refresh circuits comprises a bistable circuit, with circuit means being provided for changing each of said bistable circuits from a non-operative to an operative condition at the start of each of said sense/refresh intervals.

3. A matrix display panel and memory system according to claim 2, in which each of said bistable circuits comprises a first inverter and a second inverter, with an output terminal of said first inverter being coupled to an input terminal of said second inverter and an output terminal of said second inverter being coupled to an input terminal of said first inverter, first electronic switch coupled between said output terminal and input terminal of said first inverter and second electronic switch coupled between an operating power supply and power supply terminals of said first and second inverters, and circuit means for holding said first electronic switch in an open state and said second electronic switch in a closed state at times other than during said sense/refresh intervals and for holding said first electronic switch in a closed state and said second electronic switch in an open state during said sense/refresh intervals.

4. A matrix display panel and memory system according to claim 3, in which each of said bistable circuits further comprises a third electronic switch coupled between the output terminal of said second inverter and the input terminal of said first inverter, and a fourth electronic switch coupled between the input terminal of said first inverter and a data input/output line of said distribution circuit means, and further comprising mode selection circuit means for selectively establishing a sense/refresh mode of operation in which said third electronic switch is held in the closed state and said fourth electronic switch is held in the open state, a data readout mode in which said third electronic switch and said fourth electronic switch are held in the closed state, and a data write-in mode in which said third electronic switch is held open and said fourth electronic switch is held closed.