Hysteresis circuit having a stable output free from noise superposed on input signal
First Claim
1. A comparator comprising first and second input terminals, an output terminal, a first transistor having a control electrode connected to the first input terminal, a second transistor having a control electrode connected to the second input terminal, said first and second transistors being interconnected to form a differential amplifier, a first load connected to the first transistor, a second load connected to the second transistor, a phase-inverter, means for supplying an output of said differential amplifier to said phase-inverter, first switching means for establishing a first conduction path in parallel with said first load, said first switching means being controlled by an output of said phase-inverter, second switching means for establishing a second conduction path in parallel with said second load, said second switching means being controlled by an input to said phase-inverter, and means for coupling the output of said phase-inverter to said output terminal.
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Accused Products
Abstract
A hysteresis circuit has first and second input terminals and an output terminal. An input signal is supplied to the first input terminal, while the second input terminal receives a reference voltage. Control electrodes of first and second transistors are connected to the first and second input terminals. The two transistors are interconnected to form a differential amplifier having an output which is supplied to a phase-inversion amplifier. The output of the phase-inversion amplifier is fed to the output terminal. The load impedances of both the first and second transistors are varied depending upon the output condition of the output terminal. For example, when the output terminal is in one output condition, a third transistor is turned on and a fourth transistor is turned off. When the output terminal is in an opposite output condition, the conduction conditions of the third and fourth transistors are reversed. In other words, each time that the voltage level at the output terminal is inverted, the load impedance of both the first and second transistors are varied, to change the gain of the differential amplifier. This gain variation is fed back to reinforce the output condition.
34 Citations
15 Claims
- 1. A comparator comprising first and second input terminals, an output terminal, a first transistor having a control electrode connected to the first input terminal, a second transistor having a control electrode connected to the second input terminal, said first and second transistors being interconnected to form a differential amplifier, a first load connected to the first transistor, a second load connected to the second transistor, a phase-inverter, means for supplying an output of said differential amplifier to said phase-inverter, first switching means for establishing a first conduction path in parallel with said first load, said first switching means being controlled by an output of said phase-inverter, second switching means for establishing a second conduction path in parallel with said second load, said second switching means being controlled by an input to said phase-inverter, and means for coupling the output of said phase-inverter to said output terminal.
- 5. A comparator comprising a differential amplifier supplied with an input signal voltage and a reference voltage, an output terminal, at least one amplifier stage for amplifying an output of said differential amplifier, a phase-inversion amplifier for inverting the phase of an output of said amplifier stage, means for applying an output of said phase-inversion amplifier to said output terminal, and circuit means including a feedback circuit from the input and the output of said phase-inversion amplifier to said differential amplifier for varying the gain of said differential amplifier each time the output signal condition at the output terminal varies.
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8. A comparator comprising first and second input terminals, an output terminal;
- a first transistor having gate, drain, and source, said gate being connected to said first input terminal;
a second transistor having gate, drain, and source, said gate connected to said second input terminal;
said first and second transistors forming a differential amplifier circuit;
a third transistor having gate, drain, and source, the drain-source path being connected in series with the drain-source path of said first transistor;
a fourth transistor having gate, drain, and source, the drain-source path being connected in series with said drain-source path of the second transistor;
the gate and drain of said third transistor and the gate of said fourth transistor being connected in common;
a first circuit including fifth and sixth transistors each having gate, source and drain, said fifth and sixth transistors being connected in series with each other;
a second circuit including seventh and eighth transistors each having gates and being connected in series with each other;
said first circuit being connected in parallel with said third transistor, said second circuit being connected in parallel with said fourth transistor;
the gates of said third, fifth and seventh transistors being connected in common;
a ninth transistor having gate, source and drain, the gate being connected to the output of said differential amplifier circuit; and
a phase-inversion amplifier having an input end connected to the drain of said ninth transistor, an output end of said phase-inversion amplifier being connected to said output terminal;
the gate of said sixth transistor being connected to the output end of said phase-inversion amplifier, and the gate of said eighth transistor being connected to the input end of said phase-inversion amplifier. - View Dependent Claims (9, 10)
- a first transistor having gate, drain, and source, said gate being connected to said first input terminal;
- 11. A circuit comprising a differential amplifier having first and second sides and first and second variable impedance load circuit means respectively associated with and coupled to said first and second sides, an inverter circuit means having an input end and an output end, means for coupling said differential amplifier to the input end of said inverter circuit means, and a feedback circuit means for feeding a first feedback signal from the input end of said inverter circuit means to said first variable impedance load circuit means and a second feedback signal from the output end of said inverter circuit means to said second variable impedance load circuit means to vary the impedances of said first and second variable impedance load circuit means in response to voltage levels at the input and output ends of said inverter circuit.
Specification