Signal sampling system

• US 4,438,404 A
• Filed: 01/04/1982
• Issued: 03/20/1984
• Est. Priority Date: 01/04/1982
• Status: Expired due to Fees

• Current Assignee: Tektronix Incorporated (Fortive Corp.)
• Original Assignee: Tektronix Incorporated (Fortive Corp.)
• Inventors: Philipp, Harald
• Primary Examiner(s): Heyman, John S.
• Application Number:
  US06/337,041
• Time in Patent Office: 806 Days
• Field of Search: 307/228, 307/601, 328/63, 328/130.1
• US Class Current: 327/263
• CPC Class Codes: G01M 11/3145 Details of the optoelectronics or data analysis
• CPC Class Codes: G01R 13/347 using electro-optic elements
• CPC Class Codes: H03K 5/135 by the use of time reference signals, e.g. clock signals

Abstract

A signal sampling system includes a combined digital and analog acquisition time base for accurately sampling and displaying an extremely short duration electrical event superimposed on a long time duration signal. The signal sampling system of the present invention is intended for use in stimulus-response situations, and both stimulus and response signals are synchronized with the clock of the digital portion of the time base. The system may be operated under microprocessor control, providing both flexibility and programmability, in turn permitting not only acquisition of waveforms that start and stop at arbitrary points with extreme precision, but signal averaging or smoothing as well.

Claims

1. A sampling time base, comprising:

means for generating clock edges at a predetermined frequency;

digital timing means for generating a digital delay signal substantially coincident with the Nth clock edge of a predetermined number N of clock edges, thereby establishing a digital timing interval from the first to the Nth clock edge;

analog timing means responsive to said digital delay signal for initiating an analog timing signal substantially coincident with said Nth clock edge; and

means for generating a sampling pulse at the end of a predetermined analog timing interval of said analog timing signal.

2. A sampling time base in accordance with claim 1 wherein both said digital timing interval and said analog timing interval are programmable by a single logic control means.

3. A sampling time base in accordance with claim 2 wherein said logic control means comprises a microprocessor.

4. A sampling time base in accordance with claim 1 wherein said digital timing means comprises a programmable counter for counting said clock edges and producing said digital delay signal upon the last of a programmed number N of said clock edges.

5. A sampling time base in accordance with claim 4 wherein said programmable counter is activated upon receipt of a start signal.

6. A sampling time base in accordance with claim 1 wherein said analog timing means comprises linear ramp generating means initiated upon receipt of said digital delay signal.

7. A sampling time base in accordance with claim 6 wherein said sampling pulse generating means comprises comparison means receiving said linear ramp at one input thereof and a programmable voltage level at a second input thereof, said sampling pulse being generated by said comparison means when said linear ramp and said programmable voltage level are equal.

8. A signal sampling system, comprising:

a precision time delay generator having combined digital timing means and analog timing means for generating sampling pulses after consecutive digital and analog timing intervals, said digital timing means generating delay signals at predetermined counts of a clock signal and said analog timing means interpolating between said predetermined counts to produce said sampling pulses after combined digital and analog time delay with high temporal resolution;

means responsive to said sampling pulses for acquiring and storing samples of an input signal; and

logic control means coupled to said precision delay generator for selecting time interval values for said digital timing means and said analog timing means.

9. A signal sampling system in accordance with claim 8 wherein said digital timing means comprises a programmable counter for counting edges of said clock signal, and said analog timing means comprises ramp generating means and a programmable voltage level for producing said sampling pulses.

10. A signal sampling system in accordance with claim 9 wherein said digital timing means produces a stimulus signal to initiate said input signal, wherein the combined digital and analog time delay represents the time interval between stimulus and a succeeding response.

11. A signal sampling system in accordance with claim 8 wherein said means responsive to said sampling pulses for acquiring and storing samples of an input signal comprises in combination a sampler, an analog-to-digital converter, and a digital memory.

12. A signal sampling system in accordance with claim 8 wherein said logic control means comprises a microprocessor.