Modular programmable controller
First Claim
Patent Images
1. A programmable controller which comprises:
- a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals;
a memory module connected to the leads in the backplane bus for conducting data, address and control signals and including means for storing a control program comprised of a set of macroinstructions, and means for storing a data table;
a CPU module connected to the leads in the backplane bus for conducting data, address and control signals and including(a) CPU arbitration means for obtaining access to the backplane bus,(b) fetch means coupled to the CPU arbitration means and being responsive to a FETCH signal to generate address and control signals on the backplane bus and to thereby obtain a macroinstruction from the control program in said memory module through the backplane bus and store it in a macroinstruction register,(c) memory means for storing an I/O image table,(d) CPU processor means coupled to said fetch means, said memory means and said CPU arbitration means, said processor means being operable to repeatedly execute the control program by sequentially executing macroinstructions in said macroinstruction register and generating FETCH signals to said fetch means, and in doing so, to read and write data to the I/O image table in said memory means and to read and write data to the data table in said memory module through said CPU arbitration means and said backplane bus.
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Abstract
A programmable controller is formed by connecting separate functional modules to a common backplane bus. A bus arbitration scheme and a message handling technique are disclosed to tightly couple the functional modules together to form an efficient programmable controller. A number of improvements to the CPU module and I/O scanner module are disclosed to further improve the performance of the resulting system.
153 Citations
17 Claims
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1. A programmable controller which comprises:
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a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus for conducting data, address and control signals and including means for storing a control program comprised of a set of macroinstructions, and means for storing a data table; a CPU module connected to the leads in the backplane bus for conducting data, address and control signals and including (a) CPU arbitration means for obtaining access to the backplane bus, (b) fetch means coupled to the CPU arbitration means and being responsive to a FETCH signal to generate address and control signals on the backplane bus and to thereby obtain a macroinstruction from the control program in said memory module through the backplane bus and store it in a macroinstruction register, (c) memory means for storing an I/O image table, (d) CPU processor means coupled to said fetch means, said memory means and said CPU arbitration means, said processor means being operable to repeatedly execute the control program by sequentially executing macroinstructions in said macroinstruction register and generating FETCH signals to said fetch means, and in doing so, to read and write data to the I/O image table in said memory means and to read and write data to the data table in said memory module through said CPU arbitration means and said backplane bus. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A programmable controller which comprises:
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processor means for executing a control program to operate output devices connected to the programmable controller; and I/O scanner means connected to the processor means and coupled to the output devices, the I/O scanner means including; (a) means for storing an output image table which indicates the desired state of the output devices; (b) refresh means for continuously and sequentially coupling the output image table data to corresponding output devices; (c) means for coupling data indicative of changes in the state of output devices from the processor means to locations in the output image table storing means; (d) means coupled to the last named means for detecting the state changes made in the output image table by the processor means; and (e) output means coupled to the means for detecting state changes in the output image table, and being operable in response to such a detected state change in a selected output image table location to output image table data to the corresponding output device and to thereby update its state. - View Dependent Claims (10, 11)
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12. A programmable controller, the combination comprising:
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a plurality of separate, asynchronously operating functional modules connected to a common backplane bus, each functional module including; (a) arbitration means for obtaining control of the backplane bus to perform a read or write operation with another functional module; (b) message storage means for storing data, said message storage means having designated backplane address; (c) message handler means coupled to the arbitration means and the message storage means for coupling message data between its message storage means and the message storage means on another functional module; and memory means coupled to the backplane bus for storing a plurality of module message blocks, each module message block being associated with a respective one of the functional modules, and each module message block including; (d) means for storing a backplane interrupt address which may be read by other functional modules and employed by them to indicate that message data is available for the associated functional module; and (e) means for storing the backplane address of message data which is available for the associated functional module; wherein the message handler means for one of said functional modules which is sending message data to another one of said functional modules on the backplane bus is operable to store the backplane address of the message data in the module message block for the receiving functional module and is operable to read the receiving module'"'"'s interrupt address from its module message block and generate the same on the backplane bus to interrupt the receiving functional module and to thereby notify the receiving module that message data is available for it. - View Dependent Claims (13)
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14. In a control system having a plurality of backplane slots and a plurality of separate, asynchronously operating functional modules located in the backplane slots and connected to a common backplane bus and in which each module is operable through arbitration means for gaining control of the backplane bus to perform a read or write operation with another module connected to the backplane bus, the improvement therein comprising:
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a memory module connected to the backplane bus and storing data structures associated with functional modules connected to the backplane bus, each such data structure including means for storing the backplane bus address of its associated functional module; and power-up means connected to the arbitration means on one of said functional modules, the power-up means including means for examining each backplane slot to determine the presence of each functional module in the control system, and means for establishing a data structure in the memory module for each functional module which is present and for writing the backplane address of each such functional module into its associated data structure. - View Dependent Claims (15, 16)
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17. A programmable controller which comprises:
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a backplane bus having leads for conducting data signals, leads for conducting address signals, and leads for conducting control signals; a memory module connected to the leads in the backplane bus and including means for storing an I/O image table which indicates the state of sensing devices and operating devices connected to the programmable controller; I/O scanner means connected to the leads in the backplane bus and being operable to periodically couple data between the I/O image table and the operating devices and sensing devices connected to the programmable controller; a CPU module connected to the leads in the backplane bus and being operable in response to the instructions in a control program to examine the state of the I/O image table and to alter the state of the I/O image table in accordance with the logic embodied in the control program; and a peripheral processor module connected to the leads in the backplane bus and including means for inputting data from a terminal and means responsive to the input data and a stored program for writing data to the I/O image table which alters the state thereof, and in which the CPU module, I/O scanner means and the peripheral processor module each include arbitration means coupled to the leads in the backplane bus and the arbitration means are operable to enable only one of the CPU module, I/O scanner means or peripheral processor module to access the I/O image table in the memory module at any single moment.
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Specification