Method and apparatus for controlling access of a network transmission bus between a plurality of spaced apart computer stations

• US 4,456,956 A
• Filed: 08/24/1981
• Issued: 06/26/1984
• Est. Priority Date: 08/24/1981
• Status: Expired due to Term

• Current Assignee: Data General Corp. (Dell Technologies Inc.)
• Original Assignee: Data General Corp. (Dell Technologies Inc.)
• Inventors: El-Gohary, Hussein T., Vaillette, Gary P., Nelson, Keith F.
• Primary Examiner(s): Chan, Eddie P.
• Application Number:
  US06/295,537
• Time in Patent Office: 1,037 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 370/85, 340/825
• US Class Current: 709/225
• CPC Class Codes: G06F 13/368 with decentralised access control
• CPC Class Codes: G06F 13/372 using a time-dependent priority, e.g. individually loaded time counters or time slot
• CPC Class Codes: H01H 2300/054 Application timeslot: duration of actuation or delay between or combination of subsequent actuations determines selected function

Abstract

A computer network is disclosed in which a plurality of computer stations are interconnected by a single bi-directional bus and wherein access to the bus is controlled by the computer stations themselves through an adapter unit at each station. Each adapter unit includes a microcontroller, a transmitter, a receiver, a send buffer, a receive buffer, a line activity indicator, a pulse producing device, a read circuit and a write circuit. Each adapter unit has a unique assigned number. When the network is running and stable, control of the bus is continually passed from one live adapter unit to another in numerical sequence according to its unique assigned number and the bus is active with messages, control signals or status signals separated by relatively short intervals. If only one adapter unit is live, control is continually passed to itself. If an adapter unit in control attempts to access another adapter unit to send data to it and the other adapter unit is unable to comply with the request because its buffers are full, the numerical control passing sequence is temporarily interrupted and control is passed out of turn to that other adapter unit so that it can unload its buffers. After the buffers are unloaded, control is then passed back to the adapter unit from which it received control and the normal passing sequence is resumed. If the bus is inactive for a certain time interval, all adapter units detecting this condition enter an election mode to elect from amongst themselves one adapter unit to assume control and resume activity.

Claims

1. A computer network comprising network transmission means and a plurality of computer stations coupled to said network transmission means, each of said computer stations being capable of either acting as an independent work station or transmitting information to any one or more of said other computer stations over said network transmission means or receiving information from any one or more of said other computer stations over said network transmission means, each computer station including a computer and an adapter unit, each computer including an interface unit for interfacing with said adapter unit, each adapter unit including an internal bus and circuitry for interfacing with said network transmission means and along with said other adapter units collectively controlling access to said network transmission means, said circuitry comprising:

a. a microcontroller coupled to said internal bus for controlling the operation of said adapter unit,

b. data transfer buffers coupled to said internal bus and said interface unit in said computer for transferring data between said adapter unit and said computer,

c. means coupled to said microcontroller for storing a unique number indicating the address of said adapter unit,

d. scratch pad memory means in said microcontroller for storing a unique number indicating the address of a next adapter unit to which control of the network transmission means is to be passed,

e. a digital phase locked loop and data separator coupled to said network transmission means for separating data received into clock and data signals,

f. a read circuit coupled to the output of said digital phase locked loop and data separator for converting serial data received into parallel data,

g. a write circuit for converting parallel data from said data transfer buffers to serial form for transmission over said network transmission means,

h. means for generating a pass control signal over said network transmission means for passing control to said next adapter unit when said adapter unit wishes to relinquish control,

i. means for generating a signal over said network transmission means indicating that said adapter unit has received control pursuant to a pass control signal,

j. means for generating a request to access signal over said network transmission means to any one of said other adapter units in order to send or receive data when said adapter unit has control of said network transmission means,

k. means responsive to a request to access signal received from any one of said other adapter units for generating a first reply signal for accepting said request if said adapter unit is able to accept said request and responding thereto, and

l. means responsive to a request to access signal received from another adapter unit for generating a second reply signal indicating said adapter unit is unable to accept said request because said data transfer buffers in said adapter unit are full,

m. said pass control signal generating means responsive to said second reply signal received from any one of said other adapter units for generating a pass control signal over said network transmission means for passing control directly to said adapter unit generating said second reply signal so that said adapter unit generating said second reply signal can unload said data transfer buffers, said pass control signal generating means responsive to the completion of using said network transmission means for unloading said data buffers when control is acquired in response to said second reply signal for generating a pass control signal for passing control back to said adapter unit it received control from so that normal passing sequence can be resumed.

3. The computer network of claim 1 and wherein said circuitry further includes:

a. means for storing information concerning the type of computer to which said adapter unit is coupled,

b. means for generating a signal indicative of said information stored in response to a signal received over said network transmission means requesting such information, and

c. means responsive to a signal received by said microcontroller of said adapter unit for generating an interrogation signal over said network transmission means requesting information as to the type of computer at another computer station.

4. The computer network of claim 1 and wherein said circuitry further includes a receiver circuit coupled to said network transmission means for receiving signals transmitted over said network transmission means and a line activity indicator coupled to the output of said receiver circuit for monitoring said network transmission means for activity.

5. The computer network of claim 4 and wherein said circuitry further includes:

a. a driver circuit coupled to said network transmission means for converting the outgoing signals from said adapter unit to said transmission means to analog levels, and

b. a receiver cirucit for translating incoming signals received from said network transmission means to digital levels.

6. The computer network of claim 5 and wherein said circuitry further includes:

a. a relay circuit connecting said driver circuit and said receiver circuit to said network transmission means and

b. a switch coupled to said relay circuit and said microcontroller for opening and closing said relay circuit.

7. The computer network of claim 6 and wherein said circuitry further includes a message detector coupled to the output of said receiver circuit for detecting the presence of a message on said network transmission means.

8. The computer network of claim 7 and wherein said network transmission means comprises a single electrically continous bi-directional bus.

9. The computer network of claim 8 and wherein said bus is a coaxial cable.

19. The method of claim 1 and further including passing control to itself if there is no next adapter unit to which control can be passed.

20. The method of claim 1 and further including electing an adapter unit to assume control in the event that control passing ceases.

2. The computer network of claim 2 and wherein said pass control signal generating means for generating a pass control signal for passing control to itself when said unique number in said scratch pad memory means is said unique number in said adapter unit.

10. An adapter unit for use in interfacing a computer to a computer network transmission means and controlling access of said computer to said computer network transmission means along with other equal adapter units connecting other computers to said computer network transmission means comprising:

a. a microcontroller,

b. an internal bus coupled to said microcontroller,

c. data transfer buffers coupled to said internal bus and said interface unit in said computer for transferring data between said adapter unit and said computer,

d. means coupled to said microcontroller for storing a unique number indicating the address of said adapter unit,

e. scratch pad memory means in said microcontroller for storing a unique number indicating the address of a next adapter unit to which control of the network transmission means is to be passed,

f. a digital phase locked loop and data separator coupled to said network transmission means for separating data received into clock and data signals,

g. a read circuit coupled to the output of said digital phase locked loop and data separator for converting serial data received into parallel data,

h. a write circuit for converting parallel data from said data transfer buffers to serial form for transmission over said network transmission means,

i. meas for generating a pass control signal over said network transmission means for passing control to said next adapter unit when said adapter unit wishes to relinquish control,

j. means for generating a signal over said network transmission means indicating that said adapter unit has received control pursuant to a pass control signal,

k. means for generating a request to access signal over said network transmission means to any one of said other adapter units in order to send or receive data when said adapter unit has control of said network transmission means,

l. means responsive to a request to access signal received from any one of said other adapter units for generating a first reply signal for accepting said request if said adapter unit is able to accept said request and responding thereto,

m. means responsive to a request to access signal received from another adapter unit for generating a second reply signal indicating said adapter unit is unable to accept said request because said data transfer buffers in said adapter unit are full,

n. said pass control signal generating means responsive to said second reply signal received from any one of said other adapter unit for generating a pass control signal over said network transmission means for passing control directly to said adapter unit generating said second reply signal so that said adapter unit generating said second reply signal can unload said data transfer buffers, said pass control signal generating means responsive to the completion of using said network transmission means for unloading said data buffers when control is acquired in response to said second reply signal for generating a pass control signal for passing control back to said adapter unit it received control from so that normal passing sequence can be resumed.

11. The adapter unit of claim 10 and wherein said circuitry further includes means for generating a pass control signal for passing control to itself in the absence of a next adapter unit to which control may be passed.

12. The adapter unit of claim 11 and wherein said circuitry further includes means for storing information concerning the type of computer to which the adapter unit is coupled and means responsive to the operation of said adapter unit for generating a signal indicative of said information stored.

13. The adapter unit of claim 12 and further including:

a. a driver circuit coupled to said network transmission means for converting the outgoing signals from said adapter unit to said transmission means to analog levels, and

b. a receiver circuit for translating the incoming signals from said network transmission means to digital levels.

14. The adapter unit of claim 13 and further including:

a. a relay circuit connecting said driver circuit and said receiver circuit to said network transmission means, and a switch coupled to said relay circuit and said microcontroller for opening and closing said relay circuit.

15. The adapter unit of claim 14 and wherein said adapter unit further includes a message detector coupled to the output of said receiver circuit for detecting the presence of a message on network transmission means.

16. The adapter unit of claim 15 and wherein said adapter unit further includes line activity indicator coupled to the output of said receiver circuit for detecting activity over said network transmission means.

17. The adapter unit of claim 10 and further including:

a. means responsive to a signal received over said network transmission means for sending a remote restart signal to said computer coupled to said adapter unit to restart said computer, and

b. means responsive to a signal received from said microcontroller for sending a remote restart signal over said network transmission means to another station.

18. A method of passing control of a network transmission medium amongst a plurality of adapter units coupled to said network transmission medium, each adapter unit being coupled to a computer and including means for separating data received from the network transmission medium into clock and serial data signals and converting said separated serial data signals into parallel data signals for passing to said computer, the method comprising:

a. storing a unique number in each adapter unit indicating its own address,

b. storing a unique number in each adapter unit indicating the address of a next adapter unit to which control is to be passed by said adapter unit,

c. generating a pass control signal for passing control to said next adapter unit when an adapter unit in control does not wish to use said network transmission means,

d. generating an accept control signal in response to a pass control signal directed to it from another adapter unit,

e. generating a request to access signal to access any one of said other adapter units in order to send or receive data,

f. generating a first reply signal for accepting a request to access signal if said adapter unit is able to accept said request,

g. generating a second reply signal if said adapter unit is unable to accept said request because its buffers are full,

h. generating a pass control signal for passing control to said adapter unit generating said second reply signal, and

i. generating a pass control signal for passing control back to said adapter unit it received control from after using said network transmission medium for unloading said data transfer buffers if control was acquired in response to said second reply signal.