Storage element for speech synthesizer

• US 4,458,110 A
• Filed: 10/02/1979
• Issued: 07/03/1984
• Est. Priority Date: 01/21/1977
• Status: Expired due to Term

• Current Assignee: Electronic Speech Systems, ESS Technology Incorporated (Semiconductor Holding Corp.)
• Original Assignee: Electronic Speech Systems
• Inventors: Mozer, Forrest S.
• Primary Examiner(s): Kemeny, Emanuel S.
• Application Number:
  US06/081,248
• Time in Patent Office: 1,736 Days
• Field of Search: 179/1 SM, 179/1 SG, 179/15.55 R, 179/15.55 T, 84/1.01, 84/1.03, 340/347 DD
• US Class Current: 704/211
• CPC Class Codes: G10L 13/047 Architecture of speech synthesisers
• CPC Class Codes: G10L 19/00 Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis in musical instruments G10H

Abstract

A storage device for use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques. The storage device contains compressed information time domain signals and instruction signals specifying the particular compression technique applied to the original information bearing time domain signals to produce corresponding portions of the compressed information time domain signals. The compressed information time domain signals comprise a plurality of samples resulting from the predetermined signal compression techniques, the number of the different signal compression techniques applied to the original signals being greater than two and the ratio of the plurality of the samples to the minimum number of samples required to uniquely and intelligibly identify the original information bearing signals being no greater than about 0.2.

Claims

1. For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising:

means for storing said compressed time domain signals and instruction signals in the form of X period zeroed representations of said original time domain signals, wherein X is a fraction in the range from about one-fourth to about three-fourths, specifying the particular X period zeroing compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined X period zeroing signal compression technique; and

means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the X period zeroing technique specified by the corresponding instruction signals.

2. The combination of claim 1 wherein X is one-half.

3. For use with a synthesizer of original information bearing time domain signals from compressed information time domain signals produced by predetermined different signal compression techniques, a memory device comprising:

means for storing said compressed information time domain signals and instruction signals in the form of floating-zero, two-bit delta modulated representations of said original time domain signals specifying the particular delta modulation compression technique applied to said original information bearing time domain signals to produce corresponding portions of said compressed information time domain signals, said compressed information time domain signals comprising a plurality of samples resulting from said predetermined floating-zero, two-bit delta modulation signal compression technique; and

means for enabling said compressed information time domain signals and said instruction signals to be read out from said memory device to enable said compressed information time domain signals to be expanded using the floating-zero, 2-bit delta modulation expansion technique specified by the corresponding instruction signals.