Link regulator with feed forward switching control

• US 4,458,199 A
• Filed: 02/04/1982
• Issued: 07/03/1984
• Est. Priority Date: 02/04/1982
• Status: Expired due to Fees

• Current Assignee: Varo, Inc. (Northrop Grumman Corporation)
• Original Assignee: Varo, Inc. (Northrop Grumman Corporation)
• Inventors: Evans, William E., Gillett, Jimmie D.
• Primary Examiner(s): Smith, Jr., David
• Assistant Examiner(s): Moose, Richard M.
• Application Number:
  US06/345,669
• Time in Patent Office: 880 Days
• Field of Search: 323/204, 323/212, 323/260, 323/282, 323/286, 318/716, 318/717, 318/720, 318/722, 318/723, 318/807-809, 318/812
• US Class Current: 323/286
• CPC Class Codes: H02M 1/0022 the disturbance parameters being input voltage fluctuations
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators

Abstract

A link regulator is disclosed for providing a regulated voltage over a wide range of input frequencies and load currents. The frequency of an internal VCO and the input frequency are phase compared to provide a reference error signal. The unregulated DC voltage is integrated for a duration proportional to the error signal. This duration controls a series switching element to provide a constant volts/seconds. The output of the series switching element is filtered to a DC voltage that controls the frequency of the VCO. The DC voltage is proportional to the error signal, thus providing a feed forward system to regulate the DC voltage. During the period when the series switching element is not conducting, a shunt switch presents a low impedance to the input of the filter to clamp the input to ground. This allows for operation over a wide range of load currents without losing regulation.

Claims

1. A method for controlling a switching regulator to convert an unregulated DC voltage level to a regulated DC voltage level, comprising:

generating a pulse waveform, each pulse therein turning a series switch on to conduct current from the unregulated DC voltage level;

sensing the level of the unregulated DC voltage level on the input of the switch;

generating an integrated voltage signal that is the integral of the sensed unregulated DC voltage level with respect to time;

generating a threshold voltage;

comparing the integrated voltage level with the threshold voltage and turning the switch off when the integrated voltage level exceeds the threshold voltage such that a constant volts/seconds signal is generated on the output of the switch;

resetting the integrated voltage level to zero when the generated pulse waveform turns on the switch;

filtering the output of the switch to provide the regulated DC voltage level, the regulated DC voltage level being proportional to the preset threshold voltage;

and

varying the threshold voltage in response to variations in the regulated DC voltage level to maintain the DC voltage level constant.

2. The method of claim 1 wherein the step of integrating comprises charging a capacitor through a series resistor from the unregulated DC voltage level.

3. The method of claim 1 wherein the step of filtering comprises inputting the signal output from the switch to a series connected inductor for storage in a shunt connected capacitor and further comprising the step of switching the output of the switch to ground when the switch is off to provide a low impedance for the input of the series inductor such that peaking is prevented.

4. A method for controlling a link regulator to convert an unregulated DC level to a regulated DC level, comprising:

generating a reference frequency signal;

generating a driving frequency signal that has a frequency that is proporational to the regulated DC level;

turning a series switch on to connect the unregulated DC voltage level on the input of the switch to the output thereof;

sensing the level of the unregulated DC voltage on the input of the switch;

integrating the unregulated DC voltage level over time to provide an integrated voltage level;

comparing the phase of the driving signal to the phase of the reference signal and generating a threshold level;

comparing the integrated voltage level with the threshold level and turning the switch off when the integrated voltage level exceeds the threshold level such that a constant volts/seconds relationship is obtained on the output of the switch;

resetting the integrated voltage level to zero and turning the switch back on after a predetermined duration of time has elapsed from the preceding closure of the switch;

filtering the output of the switch to provide the regulated DC voltage level that is proportional to the threshold level;

sensing the regulated DC voltage level; and

varying the threshold voltage level in response to changes in the sensed regulated DC voltage level such that the regulated DC voltage is maintained at a constant level.

5. The method of claim 4 wherein the step of filtering comprises inputting the output signal from the switch into an L-section filter with a series inductor and a shunt capacitor and further comprising providing a low impedance on the output of the switch when the switch is turned off and removing the low impedance when the switch is turned on such that peaking is inhibited.

6. The method of claim 4 wherein the step of integrating comprises the step of charging a capacitor through a series resistor.

7. The method of claim 6 wherein the step of resetting comprises the steps of:

generating a pulse waveform having a narrow positive going pulse and a low duty cycle; and

driving a shunt switch for discharging the capacitor to reset the integraged voltage level to zero.

8. A method for regulating a link regulator to convert an unregulated DC voltage to a regulated DC voltage, comprising:

generating a reference frequency signal;

generating a variable frequency driving signal, the driving signal having a frequency that is variable as a function of the level of the regulated DC voltage;

turning a series switching element on to conduct current from the unregulated DC voltage;

comparing the phase of the reference signal and the phase of the driving signal to provide a phase error signal;

sensing the unregulated DC voltage;

integrating the sensed unregulated DC voltage with respect to time to generate an integrated voltage level;

comparing the phase error signal and the integrated voltage level and turning the series switching element off when the integrated voltage level exceeds the level of the phase error signal such that the signal output from the switch has a volts/seconds relationship dependant upon the phase error signal;

presenting a low impedance on the output of the switching element when the switching element is not conducting and removing the low impedance when the switch is turned back on;

periodically resetting the integrated voltage level to zero and turning the series switching element on such that a series of signals are periodically output by the switching element having a volts/seconds relationship dependant on the level of the phase error signal; and

filtering the output of the switching element to provide the regulated DC voltage level;

variations in the regulated DC voltage level causing the frequency of the driving signal to change and thus changing the level of the phase error signal, a change in the phase error signal causing the volts/seconds relationship to change to compensate the regulated DC voltage.

9. The method of claim 8 wherein the step of presenting a low impedance comprises shunting the output of the switching element to a ground reference.

10. The method of claim 8 wherein the step of filtering comprises inputting the signal from the switching element into a series inductor and capacitively filtering the output of the series inductor with a shunt capacitor.

11. The method of claim 8 wherein the step of presenting a low impedance comprises shunting the output of the switching element to a ground reference and the step of filtering comprises inputting the signal from the switching element into a series inductor and capacitively filtering the output of the series inductor with a shunt capacitor wherein the low impedance presented on the output of the switching element prevents the output of the series inductor from being reflected back to the output of the switching element when the current through the series inductor decays to zero.

12. A circuit for controlling a switching regulator, comprising:

a series switch having one end thereof connected to an unregulated DC voltage;

means for turning said switch on;

means for sensing the level of said unregulated DC voltage;

means for integrating said unregulated DC voltage level over time to provide an integrated voltage level;

means for generating a threshold voltage;

means for comparing said integrated voltage level with said threshold voltage and turning said switch off when said integrated voltage level exceeds said threshold voltage such that the integral of said unregulated DC voltage over the time said switch is on is dependant on said threshold voltage to provide a volts/seconds relationship that is dependant on said threshold voltage;

means for generating a pulse waveform, each pulse therein for turning on said switch and resetting said integrated voltage level to zero such that a series of integrated signals are generated having a volts/seconds relationship dependant upon said threshold voltage;

means for filtering the output of said switch to remove the time portion of the volts/seconds relationship on the signal output from said switch to provide a regulated DC voltage; and

means for varying said threshold voltage to maintain the volts/seconds relationship constant such that said regulated DC voltage also remains constant.

13. The circuit of claim 12 wherein said means for integrating comprises a resistor having one end thereof connected to said unregulated DC voltage and the other end thereof connected to one end of a capacitor, the other end of said capacitor connected to a ground reference such that said capacitor integrates said unregulated DC voltage.

14. The circuit of claim 12 wherein said means for generating a threshold voltage comprises:

a reference frequency;

a driving frequency;

a phase comparator having a first and second input, the first input thereof for receiving said reference frequency and the second input thereof for receiving said driving frequency; and

a filter for filtering the output of said phase comparator to provide said threshold voltage, said means for varying comprising means for varying said driving frequency as a function of the level of said regulated DC voltage.

15. The circuit of claim 12 wherein said means for comparing comprises:

a voltage comparator having a first and second input, said first input for receiving said integrated voltage level and said second input for receiving said threshold voltage, the output thereof changing states from logic high to logic low when said integrated voltage level exceeds said threshold voltage and the output thereof changes states from logic low to logic high when said integrated voltage level is less than said threshold voltage.

16. The circuit of claim 12 wherein said means for generating comprises an astable multivibrator.

17. The circuit of claim 12 wherein said filtering means comprises an L-section filter with a series inductor and a shunt capacitor and further comprising a single pole single thow electronic shunt switching element for presenting a low impedance to the input of said means for filtering when said switch is off and removing the low impedance when said switch is on.

18. A circuit for controlling a link regulator, comprising:

a series switch having one end and thereof connected to an unregulated DC voltage;

means for generating a reference frequency signal;

means for generating a driving frequency signal;

means for turning said switch on to conduct current from said unregulated DC voltage;

means for sensing the level of said unregulated DC voltage;

means for integrating said sensed unregulated DC voltage level over time to provide an integrated voltage level;

first means for comparing the phase of said driving frequency to the phase of said reference frequency and generating a threshold level that is dependant on the phase difference between said driving and reference frequencys;

second means for comparing said integrated voltage level with said threshold level and turning the switch off when said integrated voltage level exceeds said threshold level such that the integral of said unregulated DC voltage over the time said switch is closed provides a volts/seconds relationship that is dependant upon said threshold;

means for generating a pulse waveform, each pulse therein for turning on said switch and resetting said integrated voltage level to zero to provide a sequence of signals having a volts/seconds relationship determined by said threshold;

means for filtering the output of said switch to provide a regulated DC voltage that is proportional to said threshold level;

and

means for varying said driving frequency as a function of said regulated DC voltage to provide feedback to control the level of said threshold to maintain a constant level for said regulated DC voltage.

19. The circuit of claim 18 further comprising a single pole single throw shunt switching element for presenting a low impedence to the input of said means for filtering when said series switch is off.

20. The circuit of claim 18 wherein said means for generating said driving frequency comprises a voltage controlled oscillator.

21. The circuit of claim 18 wherein said means for integrating comprises a series resistor having one end thereof for receiving said unregulated DC voltage and the other end thereof connected to one end of a capacitor, the other end of said capacitor connected to a ground reference.

22. The circuit of claim 18 wherein said first means for comparing comprises a phase detector having a first and second input, said first input for receiving said driving frequency and said second input for receiving said reference frequency, the output thereof providing a phase error signal;

and

a filter having a first resistor with one end thereof for receiving said phase error signal and the other end thereof connected to one end of a second resistor, the other end of said second resistor connected to a ground reference and a capacitor having one end thereof connected to the other end of said first resistor and the other end of said capacitor connected to a ground reference such that said filter integrates said phase error signal.

23. The circuit of claim 18 wherein said second means for comparing comprises:

a comparator having a positive input and a negative input, said negative input for receiving said threshold level and said positive input for receiving said integrated voltage level, the output of said comparator changing states from low to high when said integrated voltage level increases to a level exceeding said preset voltage level and the output of said comparator changes from a logic high to a logic low state when the level of said integrated voltage level decreases below said threshold level; and

an inverter circuit for inverting the output of said comparator.

24. The circuit of claim 18 wherein said means for generating a pulse waveform comprises an astable multivibrator having a plurality of narrow positive going pulses.

25. The circuit of claim 18 wherein said means for filtering comprises an L-section filter having an inductor in the series leg thereof and a capacitor in the shunt leg thereof.

26. The circuit of claim 18 wherein said means for converting comprises a bridge network.