Automatic phase compensation circuit

• US 4,459,543 A
• Filed: 10/01/1981
• Issued: 07/10/1984
• Est. Priority Date: 10/01/1981
• Status: Expired due to Fees

• Current Assignee: Gould Instrument Systems, Inc. (Spectris PLC)
• Original Assignee: Gould, Inc. (Transdigm Group Incorporated)
• Inventors: McNeill, Thomas J.
• Primary Examiner(s): Tokar, Michael J.
• Assistant Examiner(s): Kelley, B. J.
• Application Number:
  US06/307,398
• Time in Patent Office: 1,013 Days
• Field of Search: 324/83 Q, 324/83 R, 324/85, 324/79 R, 324/83 D, 324/83 FE, 324/83 FM, 324/130, 324/73 AT, 324/74, 324/233, 324/225
• US Class Current: 324/76.77
• CPC Class Codes: G01R 25/04 involving adjustment of a phase shifter to produce a predetermined phase difference, e.g. zero difference

Abstract

An automatic phase compensation circuit is disclosed for use with carrier transducers. A quadrature oscillator drives the carrier transducer and provides phase reference and quadrature reference signals to a phase shifter. The phase shifter provides phase shifted reference signals. The return signal from the carrier transducer is separately demodulated with respect to each of the phase shifted reference signals. The demodulated signal with respect to the phase shifted quadrature reference signal is converted into a DC control signal which controls the amount of the phase shift of the phase shifter. The phase shifter receives the quadrature reference signal into a variable gain amplifier controlled by the DC control signal. The output of the variable gain amplifier is summed with the phase reference signal. The resultant summation is a phase shifted reference signal with the control signal controlling the amount of phase shift. The phase shifter reference signal is fed into a constant gain amplifier which outputs the phase shifted phase reference signal. A 90° phase shifter generates a phase shifted quadrature reference signal. The return signal demodulated with respect to the phase shifted phase reference signal will be the full magnitude of the return signal independant of the phase shift of the carrier transducer.

Claims

1. An automatic phase compensation circuit for measuring a return signal from a test device, said phase compensation circuit comprising:

a reference generator for generating a phase reference signal and a quadrature reference signal, said phase reference signal providing a drive means for said test device;

a phase shifter having a variable gain amplifier operatively coupled to said quadrature reference signal and a control signal, said control signal controlling the gain of said variable gain amplifier, a summing means operatively coupled to said variable gain amplifier and said phase reference signal for summing the phase reference signal and the output of said variable gain amplifier, the resultant summation being a phase shifted phase reference signal, and a 90°

phase shifter operatively coupled to said summing means for generating a phase shifted quadrature reference signal;

a first demodulation means operatively coupled to said return signal and said phase shifted quadrature reference signal for demodulating said return signal with respect to said phase shifted quadrature reference signal and for generating said control signal indicative of the demodulated signal; and

a second demodulation means operatively coupled to said return signal and to said phase shifted phase reference signal for demodulating said return signal with respect to said phase shifted phase reference signal and for generating a signal indicative thereof.

2. The automatic phase compensation circuit of claim 1 wherein said first demodulation means includes a demodulator and a filter operatively coupled to said demodulator, said filter filtering the demodulated signal into a DC level, said DC level being said control signal.

3. The automatic phase compensation circuit of claim 1 wherein said variable gain amplifier includes an operational amplifier and an FET operatively coupled to said control signal and to said operational amplifier, changes in said control signal varying the resistence of said FET and in turn varying the gain of said operational amplifier.

4. An automatic phase compensation circuit for measuring a return signal from a test device, said phase compensation circuit comprising:

a reference generator for generating a phase reference signal and a quadrature reference signal, said phase reference signal providing a drive means for said test device;

a phase shifter including, an operational amplifier operatively coupled to said quadrature reference signal, an FET operatively coupled to a control signal and to said operational amplifier, said control signal varying the resistance of said FET causing the gain of said operational amplifier to change, summing circuit operatively coupled to said operational amplifier and to said phase reference signal for summing the output of said operational amplifier with said phase reference signal, said summation defining a phase shifted phase reference signal, an automatic gain control amplifier operatively coupled to said summing circuit to generate a constant amplitude phase shifted phase refrence signal, and a 90°

phase shifter operatively coupled to said automatic gain control amplifier to generate a phase shifted quadrature reference signal;

a first demodulation means operatively coupled to said return signal and to said phase shifted quadrature reference signal for demodulating said return signal with respect to said phase shifted quadrature reference signal and for generating said control signal indicative of the demodulated signal; and

a second demodulation means operatively coupled to said return signal and to said phase shifted phase reference signal for demodulating said return signal with respect to said phase shifted phase reference signal and for generating a signal indicative thereof.

5. An automatic phase compensation circuit for measuring a return signal from a test device, said phase compensation circuit comprising:

a reference generator for generating a phase reference signal and a quadrature reference signal, said phase reference signal providing a drive means for said test device;

a phase shifter operatively coupled to said reference generator and a control signal, said phase shifter generating a phase shifted phase reference signal and a phase shifted quadrature reference signal, the amount of the phase shift being controlled by said control signal;

a first demodulator operatively coupled to said return signal and to said phase shifted quadrature reference signal, said first demodulator demodulating said return signal with respect to said phase shifted quadrature reference signal;

a first filter operatively coupled to said first demodulator, said first filter filtering the demodulated return signal with respect to said phase shifted quadrature reference signal into a DC level, said DC level being said control signal;

a second demodulator operatively coupled to said return signal and to said phase shifted phase reference signal, said second demodulator demodulating said return signal with respect to said phase shifted phase reference signal; and

a second filter operatively coupled to said second demodulator, said second filter filtering the demodulated return signal with respect to said phase shifted phase reference signal into a DC level defining a measured signal;

said phase shifter having a variable gain amplifier and a summing circuit, said summing circuit summing a variable amount of said quadrature reference signal with said phase reference signal to generate said phase shifted phase reference signal, the amount of quadrature reference signal being controlled by said control signal, said phase shifter further including a 90°

phase shifter operatively coupled to said summing circuit to output said phase shifted quadrature reference signal.

6. An automatic phase compensation and suppression circuit for measuring the variations in a return signal from a test device, said circuit comprising:

a reference generator for generating a phase reference signal and a quadrature reference signal, said phase reference signal providing a drive means to said test device;

a phase shifter operatively coupled to said reference generator and a control signal said phase shifter generating a phase shifted phase reference signal and a phase shifted quadrature reference signal, the amount of the phase shift being controlled by said control signal;

a first demodulation means operatively coupled to said return signal and to said phase shifted quadrature reference signal for demodulating said return signal with respect to said phase shifted quadrature reference signal and for generating said control signal indicative of said demodulated signal;

a calibrated zero suppression circuit operatively coupled to said phase shifted phase reference signal for generating variable amplitude, a modulated signal synchronized with said phase shifted phase reference signal;

a suppression summing circuit operatively coupled to said calibrated zero suppression circuit and said return signal, said suppression summing circuit summing the return signal with the signal from said calibrated suppression circuit to cancel at least a portion of the magnitude of said return signal; and

a second demodulation means operatively connected to said phase shifted phase reference signal and to said suppression summing circuit for demodulating the resultant signal from said suppression summing circuit with respect to said phase shifted phase reference signal.

7. The automatic phase compensation and suppression circuit of claim 6 wherein said phase shifter includes, a variable gain amplifier operatively coupled to said quadrature reference signal and said control signal, said control signal controlling the gain of said variable gain amplifier, a summing means operatively coupled to said variable gain control amplifier and said phase reference signal for summing the phase reference signal and the output of said variable gain amplifier, the resultant summation being said phase shifted phase reference signal, and a 90°

phase shifter operatively coupled to said summing means for generating a phase shifted quadrature reference signal.

8. The automatic phase compensation and suppression circuit of claim 7 wherein said variable gain amplifier includes an operational amplifier and an FET operatively coupled to said control signal and to said operational amplifier, changes in said control signal varying the resistance of said FET and in turn varying the gain of said operational amplifier.

9. An automatic phase compensation circuit for measuring a return signal from a test device, said phase compensation circuit comprising:

(a) an oscillator having a phase and a quadrature output, said phase output operatively coupled to the test device;

(b) an output circuit operatively coupled to said test device for measuring and analyzing said return signal;

(c) a phase shifter operatively coupled to said oscillator and said output circuit for producing phase shifted phase and quadrature reference signals, said phase shifter having;

(i) a variable gain amplifier operatively coupled to said quadrature output;

(ii) summing means operatively coupled to said variable gain amplifier and said phase output for summing the output of the amplifier and the phase output together, the result being said phase shifted phase reference signal;

(iii) a 90°

phase shifter operatively coupled to said summing means for producing said phase shifted quadrature reference signal; and

(d) a control circuit operatively coupled to said test device and said phase shifter for measuring and analyzing said return signal with respect to said phase shifted quadrature reference signal, said control circuit controlling the variable gain amplifier;

(e) said output circuit measuring and analyzing said return signal with respect to said phase shifted phase reference signal.

10. An automatic phase compensation circuit for measuring a return signal from a test device, said phase compensation circuit comprising:

(a) an oscillator having a phase and a quadrature output, said phase output operatively coupled to the test device;

(b) an output circuit operatively coupled to said test device for measuring and analyzing said return signal;

(c) a phase shifter operatively coupled to said oscillator and said output circuit for producing phase shifted phase and quadrature reference signals, said phase shifter having;

(i) a variable gain amplifier operatively coupled to said quadrature output;

(ii) summing means operatively coupled to said variable gain amplifier and said phase output for summing the output of the amplifier and the phase output together, the result being said phase shifted phase reference signal;

(iii) an automatic gain control amplifier operatively coupled to said summing means for generating a phase shifted phase reference output signal of constant amplitude;

(iv) a 90°

phase shifter operatively coupled to said automatic gain control amplifier for producing said phase shifted quadrature reference signal; and

(d) a control circuit operatively coupled to said test device and said phase shifter for measuring and analyzing said return signal with respect to said phase shifted quadrature reference signal, said control circuit controlling the variable gain amplifier;

(e) said output circuit measuring and analyzing said return signal with respect to said phase shifted phase reference signal.