Motor control system

• US 4,465,961 A
• Filed: 06/15/1981
• Issued: 08/14/1984
• Est. Priority Date: 06/15/1981
• Status: Expired due to Fees

• Current Assignee: Unico, Inc.
• Original Assignee: Zycron Systems Incorporated
• Inventors: Landino, Paul J.
• Primary Examiner(s): Dobeck, B.
• Assistant Examiner(s): Keane, Patrick
• Application Number:
  US06/273,769
• Time in Patent Office: 1,156 Days
• Field of Search: 318/811, 318/810, 318/800-803, 363/134, 363/26, 363/289
• US Class Current: 318/811
• CPC Class Codes: H02P 1/028 wherein the motor voltage is increased at low speed, to start or restart high inertia loads
• CPC Class Codes: H02P 27/047 V/F converter, wherein the voltage is controlled proportionally with the frequency
• CPC Class Codes: H02P 27/08 with pulse width modulation

Abstract

A motor control system for AC motors utilizing an inverter which is switched to provide pulsewidth modulated DC voltage to be applied to the motor in phase sequence. The pulsewidth modulation is a function of an input reference signal, a signal dependent on motor current and a boost signal operative at low speeds. The motor voltage is continuously regulated as a function of load to provide the necessary power to drive the load.

Claims

1. In a control system for an alternating current motor having a switching means for switching connections of a DC supply to the windings of the motor at a rate which determines the speed of the motor and for a time duration which determines the power supplied to the motor, said switching occurring in response to pulses, means for supplying a pulse train in response to a speed signal, said pulse train having a frequency which determines the speed of the motor, and means responsive to said speed signal for providing a width modulated pulse for controlling the duty cycle of said switching means, the improvement comprising means for deriving a signal indicative of DC line current, means for comparing said speed signal and said current indicative signal and deriving an error signal, means for generating another pulsewidth modulated signal as a function of said error signal, and means for controlling the duty cycle of the switching means as a function of said another signal.

2. The system of claim 1 further including means for limiting the magnitude of said current indicative signal to a predetermined value greater than the value for rated voltage of the motor.

3. The system of claim 1 where said error signal is a DC signal and it is compared with a sawtooth signal to generate said another signal, and further including a circuit responsive to said another signal for generating a pulse signal having a first rate of rise and a second higher rate of rise, said pulse signal having frequency of said another signal, means for comparing said pulse signal with said DC signal and summing the result with said another signal whereby said another signal may be modified in pulsewidth if said pulse signal reaches the value of said DC signal after said sawtooth signal reaches the value of the DC signal.

4. The system of claim 3 where the first rate of rise of said pulse signal is less than the rate of rise of said sawtooth signal and the second rate of rise is greater than the rate of rise of said sawtooth signal.

5. The system of claim 1 further including means for monitoring the current from said DC source, and means responsive to said monitoring means for disabling said switching means if the current exceeds predetermined limits in either direction.

6. The system of claim 1 further including filter means disposed across said DC source, including a resistance and a capacitance, means for shorting said resistance, and means responsive to turn-on of said system for shorting said capacitance after a predetermined time delay.

7. A method of operating an n-phase inverter to supply an n-phase load from a DC source where the inverter comprises a first set of n-switches connected between the positive DC line and the n-phase load and a second set of n-switches connected between the negative DC line and the load, comprising the steps of generating n-pair of rectangular opposite phase switch signals for each load phase, delaying the rise time of the leading edge of the opposite phase signals of each phase so that the leading edges occur after the trailing edges of the opposite phase signal, pulsewidth modulating the signals to be applied to one of the sets of switches, applying the pulsewidth modulated signals to one set of switches, applying the opposite non-pulse modulated phase signals to the other set of switches, whereby the non-pulse modulated signals determine the frequency applied to the load, and the pulsewidth modulated signals determine the voltage applied to the load.

8. A control system for energizing an AC motor from a DC source comprising means for producing a pulse signal proportional in frequency to a desired motor speed, an inverter comprising a first n switching means connected between a positive buss and the motor and a second n switching means connected between the motor and a nagative buss, a ring counter responsive to said pulse signal producing means for providing n pair of pulse train waveforms for selectively switching the switching means of said inverter to provide energy to said motor, 2n gating circuits adapted to receive the pulse train waveforms of said ring counter and provide control signals to said switching means, a first n of said gating circuits receiving an output and an inverted NOT output from said ring counter, a second n of said gating circuits receiving a NOT output and an inverted output from said ring counter, means connecting the output of one of said first n gates to a corresponding one of said first n and second n switching means, means connecting the output of the second n gates to a corresponding one of the other of said first n and second n switching, whereby one of the sets of n gates will cause one of said n switching means to switch at a rate which determines motor speed, the other set of said n gates receiving a pulse modulated signal indicative of voltage to be applied to the motor, whereby the output of said other set of n gates determines the voltage applied to said motor.

9. The system of claim 8 wherein each of said gating means comprises a delay circuit for delaying one of said counter output and NOT outputs applied thereto.

10. The system of claim 8 wherein each of said gating circuits further includes an output inhibit circuit, said inhibit circuit being responsive to DC buss current to block outputs of said gates if said buss current is beyond predetermined limits.

11. An arrangement for providing width modulated pulses in accordance with the magnitude of a DC signal comprising a sawtooth waveform generator, a first voltage comparator, means for applying the DC signal and the sawtooth waveform to said first voltage comparator, means responsive to the output of said comparator for generating a two ramp pulse waveform having essentially the same period as the period of the sawtooth waveform and coincident in time therewith, said two ramp pulse waveform having a first leading edge of lesser rate of rise than said sawtooth waveform and a second ramp portion having a rate of rise greater than said sawtooth waveform, second voltage comparator, means for applying said DC signal and said two ramp pulse waveform to said second comparator, said comparators having outputs coupled together and providing a width modulated pulse dependent upon coincidence of the level of said DC signal and one of said sawtooth waveform and said two ramp pulse waveform.

12. An improved multiphase AC motor control system of the type having a means responsive to a speed signal for generating a first pulse train with a frequency which determines the speed of the motor, a means for generating a pulse train of PWM pulses, and a master switching means responsive to the first pulse train for controlling the speed of the motor and responsive to the pulse train of PWM pulses for controlling the power supplied to the motor, and wherein the master switching means comprises a first switching means for connecting the motor to a first terminal of a DC power supply and a second switching means for connecting the motor to a second terminal of the DC supply;

the improvement comprising, means for generating a signal indicative of DC power supply current, means for modulating the width of the pulses in the pulse train of PWM pulses responsive to the current indicative signal and responsive to the speed signal, and wherein only one of the first and second switching means is responsive to the PWM pulses for controlling the power supplied to the motor and both of the first and second switching means are responsive to the first pulse train for controlling the speed of the motor.

13. The improved AC motor control system of claim 12 wherein the switching means which is not responsive to the PWM pulses comprises a power transistor connected between the DC power supply and the motor, a second transistor connected between the collector of the power transistor and the base of the power transistor in a Darlington configuration, and a base clamp resistor connected between the base and the emitter of the power transistor.