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Multi-phase subroutine control circuitry

  • US 4,467,410 A
  • Filed: 02/04/1981
  • Issued: 08/21/1984
  • Est. Priority Date: 02/04/1981
  • Status: Expired due to Term
First Claim
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1. A method of subroutine control in a data processing system which operates by performing a plurality of tasks wherein a task may include one or more subroutines, said method comprising the steps of:

  • providing subroutine entry and task identification indications when a performing task arrives at the beginning of a subroutine;

    providing subroutine return and task identification indications when a performing task arrives at the end of a subroutine;

    determining a return address in response to said subroutine entry indication;

    storing the determined return address in a first return address storage means corresponding to the identified task;

    also storing the most recently determined return address for each task in a second return address storage means corresponding to the indentified task, said second return address storage means providing for significantly faster access than said first return address storage means; and

    accessing in response to said subroutine return indication the most recent return address stored in the second return address storage means of the identified task for transfer to said system and then replacing with the next most recent address from the first storage means of the identified task; and

    performing the aforementioned steps of storing, accessing and determining concurrently for different tasks.

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