Range profile target classifier

• US 4,470,048 A
• Filed: 03/29/1982
• Issued: 09/04/1984
• Est. Priority Date: 03/29/1982
• Status: Expired due to Term

• Current Assignee: Sperry Corporation
• Original Assignee: Sperry Corporation
• Inventors: Short, Robert D. III
• Primary Examiner(s): Wilbur, Maynard R.
• Assistant Examiner(s): Barroon, Jr., Gilberto
• Application Number:
  US06/363,189
• Time in Patent Office: 890 Days
• Field of Search: 343/5 SA, 343/5 CM, 343/17, 382/34, 382/42, 367/100
• US Class Current: 342/189
• CPC Class Codes: G01S 13/02 Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
• CPC Class Codes: G01S 7/412 based on a comparison between measured values and known or stored values
• CPC Class Codes: G06V 10/255 Detecting or recognising potential candidate objects based on visual cues, e.g. shapes

Abstract

A range profile classifier wherein targets are identified based on the sequences of their received range profiles. Individual looks at a target are taken and it is assumed that the aspect angle of observation changes by no more than a predetermined amount. Correlations are made with reference data, which correlations are then summed recursively according to preselected restrictive criteria to obtain the most likely sequence corresponding to the target for which reference data is stored in the range profile target classifier.

Claims

1. A range profile target classifier for identifying targets according to a sequence of received range profiles observed at a plurality of aspect angles, said aspect angles having a predetermined aspect angle increment, comprising:

input means for receiving a multiplicity of discrete range profile data signals, each of said multiplicity corresponding to a discrete look at said target;

a plurality of profile correlator means coupled to said input means for comparing said received discrete range profile data signals to a plurality of reference profile data signals, each of said profile correlator means corresponding to a predetermined target and each of said reference profile data signals corresponding to a preselected aspect of said predetermined target and for providing a correlation number representative of match between said received and said reference profile data signals;

a plurality of sequence correlator means coupled to a corresponding one of said plurality of profile correlator means for providing a signal representative of the maximum sum of said correlation numbers obtained from successive looks at said target, said sums selected from looks having aspect angles changing by no more than an integral number of said predetermined aspect angle increment and having no more than one of said aspect angles for each of said looks; and

maximum detector means coupled to said plurality of sequence correlator means for detecting the largest of said maximum sum signals received from said plurality of sequence correlator means and for providing a signal representative thereof.

2. The apparatus according to claim 1 wherein said maximum detector further comprises means for indicating said sequence.

3. The apparatus according to claim 1 or 2 further comprising input summing means having first and second summing terminals, and an output terminal, said first summing terminal being coupled to said input means, and said output terminal being coupled to said plurality of profile correlator means, for summing signals applied to said summing terminals and for providing a signal representative thereof at said output terminal.

4. The apparatus according to claim 3 wherein said profile correlator comprises a plurality of matched filters, each of said matched filters providing said correlation number indicative of the match between said received range profile signal and a reference range profile signal for a predetermined target observed from a predetermined aspect angle.

5. The apparatus according to claim 4 wherein said integral number of said predetermined aspect angle increment is one.

6. The apparatus according to claim 5 wherein said sequence correlator comprises:

a plurality of summing means having first and second input terminals, said first input terminal coupled to a one of said plurality of matched filters, for summing signals applied to said first and second input terminals;

a plurality of delay means coupled to a corresponding one of said summing means for delaying signals received therefrom by a period equal to time between said looks and for providing a delayed signal indicative thereof;

a plurality of maximum and store means having first, second, and third terminals, each of said terminals coupled to a one of said plurality of delay means wherein said delay means so coupled correspond to sequentially determined aspects of said target, for selecting a maximum of said delayed signal and for providing said maximum signal to an output terminal and for storing said maximum signal, said output terminal being coupled to said summing means second input terminal.

7. The apparatus according to claim 6 wherein a d.c. bias signal is applied to said input summing means second summing terminal.

8. The apparatus according to claim 7 wherein said maximum and store means comprises:

first, second, and third input means for providing first, second and third input signals respectively;

first comparator means having first and second comparator input terminals and an output terminal, said first comparator first input terminal coupled to said first input means, and said first comparator second input terminal coupled to said second input means, for providing a logic one output signal at said output terminal if said first input signal comparator is greater than or equal to said second input signal and for further providing a logic zero output signal if said first input signal is less than said second input signal;

first latch means having first, second, and third input terminals and an output terminal, said first latch input terminal coupled to said first input means, said second latch input terminal coupled to said second input means and said third latch input terminal coupled to said first comparator means output terminal for transferring said first input signal to said first latch output means if a logic one is presented to said first latch third input terminal and for transferring said second input signal if first comparator output signal is a logic zero;

second comparator means having first and second terminals, said second comparator first terminal coupled to said first latch output terminal and said second comparator second input terminal coupled to said third input means, and having an output terminal for providing a logic one output signal at said second comparator output terminal if a signal at said second comparator first input terminal is greater than or equal to a signal at said third input signal, and for further providing a logic zero output signal at said second comparator output terminal if said signal at said second comparator first input terminal is less than said third input signal; and

second latch means having first, second and third input terminals and an output terminal, said second latch first input terminal coupled to said first latch output terminal, said second latch second input terminal coupled to said third input means and said second latch third input terminal coupled to said second comparator output terminal for storing a signal and providing said stored signal at said second latch output terminal, wherein said signal stored in equal to said first latch output signal if said second comparator output signal equals logic one, and said signal stored equals said third input signal if said signal applied to said second latch third input terminal equals logic zero.

9. The apparatus according to claim 8 further comprising memory means having first and second input terminals and an output terminal, said first input terminal being coupled to said first comparator means output terminal and said second input terminal being coupled to said second comparator output terminal, for providing a logic negative one at said memory means output terminal if a logic one is applied to said memory means first and second input terminal, and for providing a logic zero at said memory means output terminal if a logic zero is applied to said memory means first input terminal and a logic one to said memory means second input terminal, and for further providing a one when said signal applied to said memory means first input terminal equals one of said signal applied to said memory means second input terminal equals zero.

10. A method for identifying targets according to a sequence of received range profiles observed at a plurality of aspect angles, said aspect angles having a predetermined aspect angle increment, said method comprising:

receiving a multiplicity of discrete range profile data signals, each of said multiplicity corresponding to discrete look at said target;

comparing said received discrete range profile data signals to a plurality of reference profile data signals, each of said reference profile data signals corresponding to a preselected aspect of said target and further providing a correlation number representative of match between said received and reference range profile data signals;

providing a signal representative of the maximum sum of said correlation numbers obtained from successive looks at said target and corresponding to aspects changing by no more than an integral number of said predetermined aspect angle increment, and having no more than one of said aspect angle for each of said looks; and

detecting the largest of said maximum sum signals and providing a signal representative thereof.

11. The method according to claim 10 wherein the step of comparing comprises multiplying received range profile signals received from a predetermined range by reference range profile signals having a corresponding range;

and

summing up the results of said multiplication over said target'"'"'s range profile.

12. The method according to claim 11 wherein said step of providing a signal representative of the maximum sum of said correlation numbers comprises:

summing said correlation numbers with a preselected signal;

delaying said sum signal by a time period equal to the time between said looks;

selecting the maximum of said delayed signals corresponding to sequentially determined aspects of said target;

storing said selected maximum signal to provide said preselected signal for summation; and

selecting the maximum of said selected maximum signal.

13. The method according to claim 12 further comprising the step of summing said discrete range profile data signals with a predetermined d.c. bias voltage.