Power control circuit

• US 4,473,784 A
• Filed: 03/14/1983
• Issued: 09/25/1984
• Est. Priority Date: 03/14/1983
• Status: Expired due to Fees

• Current Assignee: Gene S. Morez
• Original Assignee: Gene S. Morez
• Inventors: Morez, Gene S.
• Primary Examiner(s): Truhe, J. V.
• Assistant Examiner(s): Ip, Paul Shik Luen
• Application Number:
  US06/474,784
• Time in Patent Office: 561 Days
• Field of Search: 318/439, 318/345 R, 318/345 A, 318/345 C, 318/345 CA, 318/345 AB, 318/345 B, 318/345 D, 318/345 E, 318/345 F, 318/345 G, 318/345 H, 318/244 , 318/245, 318/301, 318/332, 318/341, 318/333, 318/349, 318/334, 363/124, 363/126, 363/127, 363/128, 363/131, 363/132, 363/133, 363/136, 363/137, 307/125, 307/127, 307/130
• US Class Current: 318/400.17
• CPC Class Codes: H02P 7/29 using pulse modulation

Abstract

A circuit for controlling the power delivered to a load from an alternating current source includes a bridge rectifier coupled to the alternating current source for developing full and half-wave rectified signals in response thereto. The full and half-wave rectified signals are algebraically added to form a reference signal which is applied to one input of a comparator, the other input comprising an adjustable direct current control signal. The output of the comparator comprises a pulse width modulated signal which is used to control the state of a switching transistor connected in series with the load between the rectifier node developing the full-wave rectified signal and a point of reference potential.

Claims

1. A circuit for controlling the power delivered to a load from an alternating current source comprising:

means responsive to the alternating current source for developing a full-wave rectified reference dignal comprising a succession of half-cycle segments whose peak amplitudes alternate between first and second values;

control means for generating an adjustable direct current control signal;

means for developing a pulse width modulated signal having a first level whenever the level of the control signal exceeds the instantaneous level of the reference signal and otherwise having a second level; and

output means responsive to one of the first or second levels of the pulse width modulated signal for connecting the load in circuit with the full-wave rectified reference signal developing means.

2. A power control circuit according to claim 1 wherein said reference signal developing means comprises a bridge rectifier having first and second nodes for developing full and half-wave rectified signals respectively in response to the alternating current source, and further including means for algebraically adding the full and half-wave rectified signals for developing said reference signal.

3. A power control circuit according to claim 2 wherein said output means comprises switching means responsive to said pulse width modulated signal, the switching means and the load being connected in series between said full-wave rectifying node and a point of reference potential.

4. A power control circuit according to claim 3 wherein said pulse width modulated signal developing means comprises a comparator for comparing the reference and adjustable direct current control signals for developing said pulse width modulated signal.

5. A power control circuit according to claim 4 including a signal smoothing capacitor connected in parallel across the load for reducing the switching risetimes introduced by the switching means.

6. A power control circuit according to claim 5 including an isolating diode and a first capacitor connected in series between the full-wave rectifying node and the point of reference potential for developing a biasing signal for biasing the control means and the comparator.

7. A power control circuit according to claim 6 wherein the comparator comprises a first input for receiving the adjustable direct current control signal from the control means and including a second capacitor connected between the first input and the point of reference potential and a switch means selectively operable for establishing a discharge path for the second capacitor.

8. A circuit for controlling the power delivered to a load from an alternating current source comprising:

bridge rectifier means coupled to the alternating current source and having first and second nodes for developing full and half-wave rectified signals respectively in response thereto;

means for algebraically adding the full and half-wave rectified signals for developing a reference signal;

control means for generating an adjustable direct current control signal;

means for comparing the reference and control signals for developing a pulse width modulated signal having a first level whenever the level of the control signal exceeds the instantaneous level of the reference signal and otherwise having a second level;

switching means responsive to one of the first or second levels for assuming a conductive state and responsive to the other of said levels for assuming a non-conductive state, the switching means and the load being connected in series between the full-wave rectifying node and a point of reference potential.

9. A power control circuit according to claim 8 including a signal smoothing capacitor connected in parallel across the load for reducing the switching risetimes introduced by the switching means.

10. A power control circuit according to claim 8 including an isolating diode and a first capacitor connected in series between the full-wave rectifying node and the point of reference potential for developing a biasing signal for biasing the control and comparing means.

11. A power control circuit according to claim 8 wherein the comparing means comprises a first input for receiving the control signal from the control means and including a second capacitor connected between the first input and the point of reference potential and a switch means selectively operable for establishing a discharge path for the second capacitor.