Coordinated load commutated inverter protection system

• US 4,475,150 A
• Filed: 04/28/1982
• Issued: 10/02/1984
• Est. Priority Date: 04/28/1982
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: D'Atre, John D., Walker, Loren H., Espelage, Paul M., Lippitt, David L.
• Primary Examiner(s): Shoop, William M.
• Application Number:
  US06/372,750
• Time in Patent Office: 888 Days
• Field of Search: 318/798, 318/806, 363/34, 363/35, 363/37, 363/50, 363/51, 363/79, 364/480, 364/483
• US Class Current: 363/51
• CPC Class Codes: H02H 7/1216 for AC-AC converters
• CPC Class Codes: H02M 5/4505 having a rectifier with controlled elements

Abstract

A fault protective system for a load commutated inverter motor drive including an AC to DC source side converter coupled from an AC source to a DC to AC load side converter via a DC link circuit and wherein the load side converter supplies AC power of varying magnitude and frequency to the synchronous motor load. A pair of microcomputers interlinked by a common digital memory respectively control the inverters and interface with hardware type sensor means for detecting the occurrence of a plurality of different types of faults. Additionally, a number of stored instructional sets or programs are respectively included in both microcomputers to detect by software means another plurality of faults. The detection of a fault on either side of the link circuit is communicated to the respective computer which subsequently communicates with the other microcomputer to effect a coordinated protective action in response to thyristor cell failures, circuit failures, and abnormal operating conditions. Cell failure faluts include those instances where a thyristor cell actually fails due to an open or short circuit as well as those cases where a cell fails to commutate properly due to firing strategy problems. Cirucit failures include open and short circuits both in the supply line and the motor leads, while abnormal operating conditions involve such things as low line voltage or excessive motor voltage.

Claims

1. A method of protecting a power conversion system coupled to an AC load and including an AC to DC source side converter coupled from an AC source to a DC to AC load side converter via a DC link circuit and comprising the steps of:

(a) detecting a plurality of system faults by selectively located voltage and current sensor apparatus coupled to said system;

(b) detecting a plurality of system faults by self-contained instructional codes contained in respective first and second computer apparatus coupled to and adapted to control the source side converter and said load side converter;

(c) effecting a direct type of protective action in response to certain ones of said faults detected by said sensor apparatus;

(d) effecting first and second types of computer apparatus assisted protective action in response to certain others of said faults detected by said sensor apparatus; and

(e) effecting said first and second types of computer apparatus assisted protective action in response to said faults detected by said computer apparatus.

2. The method as defined by claim 1 wherein said step of effecting direct type of protective action comprises tripping switchgear for rendering the system inoperative until a reset operation is performed.

3. The method as defined by claim 2 wherein said source side and said load side converters are comprised of thyristor converters and wherein said first type of protective action for faults detected by both said sensor apparatus and faults detected by said computer apparatus comprise the step of (i) calling said converters to their respective inversion limit wherein the thyristor converters are fired substantially at full retard followed by the step of (ii) effecting a predetermined recovery procedure for re-establishing normal operation thereof, and

wherein said second type of protective action comprises the steps of (iii) calling said converters to their respective inversion limit followed by the step of (iv) tripping of switchgear apparatus for shutting the system down.

4. The method as defined by claim 3 and additionally including the steps of:

(f) interconnecting said first and second computer apparatus via a common memory;

(g) communicating a fault to said memory and setting a predetermined bit in a digital storage of said memory to a selected logic state for selected faults detected by either of said computer apparatus;

(h) communicating said setting step to the other computer apparatus; and

(i) said first and second computer apparatus thereafter operating to call their respective converters to inversion limit.

5. The method as defined by claim 4 and wherein said step (a) of detecting a plurality of system faults by sensor apparatus comprises detecting source undervoltage, source overvoltage and source overcurrent.

6. The method as defined by claim 5 wherein the step of detecting source undervoltage and source overvoltage is followed by the step of effecting said second type of computer apparatus assisted protective action of step (d).

7. The method of claim 5 wherein said step of detecting source overcurrent is followed by effecting a direct type of protective action of step (c).

8. The method as defined by claim 4 wherein said step (a) of detecting a plurality of system faults by sensor apparatus comprises detecting load overvoltage and load overcurrent.

9. The method of claim 8 wherein said step of detecting load overvoltage is followed by the step of effecting said second type of computer apparatus assisted protective action of step (c).

10. The method as defined by claim 8 wherein the step of detecting load overcurrent is followed by the step of effecting a direct type of protective action of step (c).

11. The method as defined by claim 3 wherein said step (a) of detecting a plurality of system faults by sensor apparatus comprises sensing thyristor cell overvoltage in said source side converter and said load side converter and thereafter effecting a direct type of protective action, said direct type of directive action comprising the step of directly firing the cell having the overvoltage.

12. The method as defined by claim 3 wherein said step (a) of detecting a plurality of faults by sensor apparatus includes detecting an overspeed condition of an AC motor load which is followed by the step (c) of effecting a direct type of protective action.

13. The method as defined by claim 3 wherein said step (a) of detecting a plurality of system faults by sensor apparatus includes detecting a ground fault which is followed by the step of effecting said second type of computer apparatus assisted protective action.

14. The method as defined by claim 3 wherein said step (a) of detecting a plurality of system faults by sensor apparatus includes the step of sensing a no-start condition of an AC motor load which is thereafter followed by a step of effecting said second type of computer apparatus assisted protective action of step (d).

15. The method as defined by claim 3 wherein said step (b) of detecting a plurality of system faults by self-contained instructional codes contained in said computer apparatus comprises separately detecting source side converter shoot through, source side converter shorted thyristor cell and source side converter commutation failure.

16. The method as defined by claim 15 wherein said step (b) of detecting source side converter shoot through and commutation failure is followed by effecting said first type of computer assisted protective action of step (e).

17. The method as defined by claim 15 wherein said step (b) of detecting source side converter shorted thyristor cell is followed by the step of effecting said first type of computer apparatus assisted protective action of step (e).

18. The method as defined by claim 3 wherein said step (b) of detecting a plurality of system faults by computer apparatus comprises steps of detecting load side converter shoot through, shorted thyristor cell and commutation failure.

19. The method as defined by claim 18 wherein said step (b) of detecting load converter shoot through and commutation failure is followed by the step of effecting said first type of computer apparatus assisted protective action of step (e).

20. The method as defined by claim 18 wherein said step (b) of detecting a load side converter shorted cell is followed by the step of effecting said second type of computer apparatus assisted protective action of step (e).

21. The method as defined by claim 3 wherein said step (b) of detecting a plurality of system faults by computer apparatus includes the step of detecting source side converter overcurrent and load side converter overcurrent and thereafter effecting said second type of computer apparatus assisted protective action of step (e) in the event of either overcurrent condition.

22. The method as defined by claim 3 wherein said step (ii) of effecting a predetermined recovery procedure comprises adaptively selecting a predetermined recovery pattern for firing selected thyristor cells in said source side converter and said load side converter.

23. The method as defined by claim 3 wherein said AC load comprises a synchronous motor.

24. The method as defined by claim 3 wherein said AC load comprises a polyphase synchronous motor and said AC source comprises a polyphase AC source.

25. A protective system for a power conversion system adapted to drive an AC synchronous motor and including an AC to DC source side thyristor converter coupled from an AC source to a DC to AC load side thyristor converter via a DC link circuit, comprising:

(a) voltage and current sensor means for detecting a plurality of system faults;

(b) source side computer means and load side computer means for detecting a plurality of system faults and for respectively controlling the source side converter and the load side converter;

(c) a memory and intercommunication means coupled between said computer means whereby faults detected by either computer means is communicated with the other computer means to effect a coordinated protective action;

(d) means for providing a direct type of protective action in response to at least one of said faults detected by said sensor means;

(e) stored instructional code means in both said computer means for providing first and second types of protective action in response to other faults of said plurality of faults detected by said sensor means; and

(f) stored instructional code means in both said computer means for providing said first and second types of protective action in response to said plurality of faults detected by said computer means.

26. The system as defined by claim 25 wherein said means for providing a direct type of protective action includes switchgear means which is operative in response to a detected fault by said sensor means to shut the system down in an orderly fashion.

27. The system as defined by claim 26 and wherein said first type of protective action by said stored instructional code means operates to call both converters to inversion limit wherein the thyristor converters are fired substantially at full retard and thereafter generating control signals for implementing a predetermined recovery procedure for reinstating normal system operation, and

wherein said second type of protective action operates to call said converters to inversion limit and thereafter generating control signals for operating said switchgear means.

28. The system as defined by claim 25 wherein said stored instructional code means in both said computer means is adapted to generate a predetermined respective bit for a particular fault detected, said bit being set to a predetermined logic state in said memory, said other computer means being adapted to read said predetermined logic state of said bit whereupon both computer means operate to call their respective thyristor converters to inversion limit, following which a recovery procedure is initiated or system shut down is effected.

29. A system for protecting a power conversion system coupled to an AC load and including an AC to DC source side converter coupled from an AC source to a DC to AC load side converter via a DC link circuit and comprising:

(a) means for detecting a plurality of system faults and including selectively located voltage and current sensor means coupled to said system;

(b) means for detecting a plurality of system faults and including a plurality of self-contained instructional codes contained in respective first and second computer means coupled to and adapted to control the source side converter and said load side converter;

(c) means for effecting a direct type of protective action in response to certain ones of said faults detected by said sensor means;

(d) said instructional codes being operable to provide first and second types of computer means assisted protective action in response to certain others of said faults detected by said sensor means; and

(e) said instructional codes being further operable to provide said first and second types of computer means assisted protective action in response to said faults detected by said computer means.

30. The system as defined by claim 29 wherein said means (c) for effecting a direct type of protective action comprises a plurality of switchgear means which are selectively deactivated for shutting down the system.

31. The system as defined by claim 29 wherein said load comprises an AC motor and said source side converter and said load side converter are comprised of thyristor converters, and

wherein said first type of protective action for faults detected by both said sensor means and faults detected by said computer means comprises, (i) calling said converters, respectively, to inversion limit wherein the thyristor converters are fired substantially at full retard followed by, (ii) effecting a predetermined recovery procedure for re-establishing normal operation thereof, and

wherein said second type of protective action comprises, (iii) calling said converters, respectively, to inversion limit followed by, (iv) selective tripping of said switchgear means.

32. The system as defined by claim 31 and additionally including:

(f) a common memory interconnecting said first and second computer means; and

(g) means for communicating a fault signal to said memory and setting a predetermined bit of a digital word therein to a selected logic state for selected faults detected by either of said computer means;

said first and second computer means thereafter operating in response to the bit set to call their respective converters to inversion limit.

33. The system as defined by claim 32 wherein said means for detecting a plurality of system faults by sensor means comprises means for detecting source side and load side overvoltage and overcurrent.

34. The system as defined by claim 32 wherein said means for detecting a plurality of system faults by sensor means includes means for sensing thyristor cell overvoltage in either said source side converter or said load side converter and including means for producing a substantially immediate and direct firing of the cell having the overvoltage.

35. The system as defined by claim 32 wherein said means of detecting a plurality of faults by sensor means includes means for detecting an overspeed condition of an AC motor.

36. The system as defined by claim 32 wherein said means for detecting a plurality of system faults by sensor means includes means for detecting a ground fault.

37. The system as defined by claim 32 wherein said means for detecting a plurality of system faults by sensor means includes means for sensing a no-start condition of an AC motor.

38. The system as defined by claim 32 wherein said means for detecting a plurality of system faults by said self-contained instructional codes contained in said computer means comprises means for detecting source side and load side converter shoot through, source side and load side converter shorted thyristor cell and source side and load side converter commutation failure.