System for monitoring, transmitting and conditioning of information gathered at selected locations

• US 4,476,535 A
• Filed: 06/15/1981
• Issued: 10/09/1984
• Est. Priority Date: 06/01/1979
• Status: Expired due to Fees

• Current Assignee: Loshing Marie Executrix of The Estate of Clement T Loshing Dec'D
• Original Assignee: Loshing Marie Executrix of The Estate of Clement T Loshing Dec'D
• Inventors: Thompson, Ralph J., Loshing, Clement T.
• Primary Examiner(s): Wise, Edward J.
• Application Number:
  US06/273,933
• Time in Patent Office: 1,212 Days
• Field of Search: 364/480, 364/481, 364/483, 364/550, 340/870.11, 340/870.13, 340/870.19
• US Class Current: 702/62
• CPC Class Codes: G01R 21/00 Arrangements for measuring electric power or power factor G01R7/12 takes precedence
• CPC Class Codes: H02J 13/00009 using pulsed signals
• CPC Class Codes: Y02E 60/00 Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
• CPC Class Codes: Y04S 40/121 using the power network as support for the transmission

Abstract

A system is provided for gathering information concerning power consumption at different locations, generating signals corresponding to this power consumption, transmitting the signals to a selected location and conditioning the signals for recording and subsequent analysis by computer. The signals have frequencies proportional to the power consumption monitored plus a preselected offset frequency which can be synchronized with an outside source such as the line frequency of readily available power lines.

Claims

1. An apparatus for processing a plurality of digital pulse signals generated by a like plurality of measuring devices comprising:

a corresponding plurality of first resettable memory means electrically connected to a corresponding one of said measuring devices, each said first resettable memory means being adapted to be actuated to a set condition upon reception of a digital pulse from its associated measuring device;

a clock adapted to generate a signal having a frequency equal to or greater than the product of the number of measuring devices from which digital pulses are received and the highest pulse rate expected from any single measuring device;

a second resettable memory means;

switch means adapted to sequentially connect and then disconnect each of said first resettable memory means to said second resettable memory means at a rate determined by said clock;

means adapted to sequentially activate each switch means;

means adapted to reset each said first resettable memory means; and

means adapted to reset said said second resettable memory means after each of said first resettable memory means has been connected to and then disconnected from said second resettable memory means.

2. A method of processing a plurality of digital pulse signals generated by a like plurality of digital measuring devices including the steps of:

(a) applying the digital pulse signal from each measuring device to a corresponding one of a like plurality of first resettable memory means each electrically connected to a corresponding one of said measuring devices;

(b) activating an enabling gate electrically connected to a selected one of said first resettable memory means to apply the output of said selected first resettable memory means to the input of a second resettable memory means;

(c) resetting the selected first resettable memory means connected to the actuated enabling gate and the second resettable memory means;

(d) disabling the activated enabling gate;

(e) repeating above steps (a) (b) (c) (d) sequentially for each first resettable memory means and a correspondng enabling gate connected thereto at a rate sufficient to apply the output of each of said first resettable memory means to said second resettable memory means at least as frequently as the highest pulse frequency expected from any one of said digital measuring devices.

3. A method of processing a plurality of digital pulse signals generated by a like plurality of digital measuring devices including the steps of:

(a) applying the digital pulse signal from each measuring device to a corresponding one of a like plurality of first resettable memory means each electrically connected to a corresponding one of said measuring devices;

(b) activating an enabling gate electrically connected to a selected one of said first resettable memory means to apply the output of said selected first resettable memory means to the input of a second resettable memory means;

(c) resetting the selected first resettable memory means connected to the actuated enabling gate and the second resettable memory means;

(d) disabling the activated enabling gate;

(e) repeating above steps (a) (b) (c) (d) sequentially for each first resettable memory means and a corresponding enabling gate connected thereto at a rate sufficient to apply the output of each of said first resettable memory means to said second resettable memory means at least as frequently as the highest pulse frequency expected from any one of said digital measuring devices, wherein said first resettable memory means is reset by delaying the signal used to activate the enabling gate and applying said delayed signal to resetting means on said first resettable memory means.

4. The method of claim 3 including generating a pulsed clock signal having a pulse rate equal to or greater than the product of the number of measuring devices from which signals are received and the highest pulse rate from any single measuring device, distributing single clock pulses sequentially to each said enabling gate in turn thereby actuating said enabling gate and using said clock pulses to actuate a second delay means which will reset said second resettable memory means.