Semiconductor integrated circuit device including means for reducing the amount of potential variation on a reference voltage line
First Claim
1. A semiconductor integrated circuit device comprising:
- a pair of first and second wirings to which a power-supply voltage is applied;
an electronic circuit connected between said first wiring and said second wiring, and to which said power-supply voltage is applied via said first and second wirings;
a third wiring to which a reference voltage is applied;
a reference voltage generator to which said power-supply voltage is applied via said first and second wirings, said reference voltage generator including means for producing said reference voltage;
a first capacitor for a-c coupling said third wiring to said second wiring; and
a second capacitor for transmitting variations in potential produced on said first wiring to said third wiring;
wherein when first and second potential variations substantially equal in magnitude and opposite in phase have developed respectively on said first and second wirings due to changes in the operation current of said electronic circuit, the potential variation supplied to said third wiring via said first capacitor is substantially cancelled by the potential variation supplied to said third wiring via said second capacitor.
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Accused Products
Abstract
In an MOS memory, a reference voltage is generated to determine an input threshold voltage of the input circuit. Noise fed from various signal wirings to the reference voltage wiring via stray capacitances is reduced by a decoupling capacitance formed between the reference voltage wiring and the ground wiring. The decoupling capacitance, however, permits relatively large levels of noise induced on the ground wiring by changes in the operation current of the circuit to be transmitted to the reference voltage wiring. According to this invention, a capacitance which forms a pair with the decoupling capacitance is provided between the power-supply wiring and the reference voltage wiring. Noise induced on the power-supply wiring by a change in the operation current of the circuit is substantially opposite in polarity to the noise induced on the ground wiring. Therefore, the noise fed from the ground wiring to the reference voltage wiring is cancelled by the capacitance provided between the power-supply wiring and the reference voltage wiring.
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Citations
14 Claims
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1. A semiconductor integrated circuit device comprising:
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a pair of first and second wirings to which a power-supply voltage is applied; an electronic circuit connected between said first wiring and said second wiring, and to which said power-supply voltage is applied via said first and second wirings; a third wiring to which a reference voltage is applied; a reference voltage generator to which said power-supply voltage is applied via said first and second wirings, said reference voltage generator including means for producing said reference voltage; a first capacitor for a-c coupling said third wiring to said second wiring; and a second capacitor for transmitting variations in potential produced on said first wiring to said third wiring; wherein when first and second potential variations substantially equal in magnitude and opposite in phase have developed respectively on said first and second wirings due to changes in the operation current of said electronic circuit, the potential variation supplied to said third wiring via said first capacitor is substantially cancelled by the potential variation supplied to said third wiring via said second capacitor. - View Dependent Claims (2, 3, 4, 5)
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6. A semiconductor integrated circuit device comprising:
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a semiconductor substrate; a pair of first and second wiring layers that are formed on said semiconductor substrate and to which a power-supply voltage is applied; an electronic circuit connected between said first wiring layer and said second wiring layer, and to which said power-supply voltage is applied via said first and second wiring layers; a reference voltage generator which contains a plurality of resistance elements and which produces a reference voltage upon receipt of the power-supply voltage via said first and second wiring layers; a third wiring layer formed on said semiconductor substrate and to which said reference voltage is applied; an input circuit which is comprised of a plurality of insulated gate field effect transistors, and which has a first input terminal that receives input signals from the outside of said semiconductor substrate, and a second input terminal to which said reference voltage is applied via said third wiring layer; a first capacitor connected between said first wiring layer and said third wiring layer; and a second capacitor connected between said second wiring layer and said third wiring layer, wherein when first and second potential variations substantially equal in magnitude and opposite in phase have developed respectively on said first and second wiring layers due to changes in the operation current of said electronic circuit, the potential variation supplied to said third wiring layers via said first capacitor is substantially cancelled by the potential variation supplied to said third wiring layers via said second capacitor. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14)
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Specification