Signal acquisition and tracking system

• US 4,477,812 A
• Filed: 05/29/1981
• Issued: 10/16/1984
• Est. Priority Date: 05/29/1981
• Status: Expired due to Fees

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Frisbee, Belmont Jr., Swedblom, Charles E.
• Primary Examiner(s): Blum, Theodore M.
• Application Number:
  US06/268,303
• Time in Patent Office: 1,236 Days
• Field of Search: 343/774, 343/754, 343/777, 343/778, 343/729, 343/730, 343/725, 343/372, 343/377, 343/417, 343/374
• US Class Current: 342/417
• CPC Class Codes: H01Q 3/267 Phased-array testing or checking devices

Abstract

Microprocessor controlled electronically scanned collinear array receiver stem includes a dipole antenna mounted atop the array to provide complete scan coverage from horizon to horizon. The microprocessor controls the scan angle and the frequency range to provide full search coverage for all scan angles in a hemisphere. Simultaneous angle tracking and frequency tracking are accomplished when the desired signal is acquired.

Claims

1. A circuit for use in a signal acquisition and tracking system in a known frequency range with a signal of known modulation characteristics comprising:

means for receiving electromagnetic signals originating omnidirectionally in azimuth with respect to a predetermined location and from within a narrow beam width which is of variable elevation;

a tuning network varying the frequency received over said frequency range operably connected to said receiving means; and

means for controlling the variation in elevation of said receiving means sensitivity and for simultaneously and selectively controlling the frequency variation accomplished by said tuning network, operably connected to said receiving means and said tuning network.

6. A circuit according to claim 1 wherein said controlling means comprises:

a microprocessor, having outputs to said tuning network for controlling gain and frequency an output for validated data;

a programmable read only memory containing information to enable said microprocessor

to control the remainder of the system and operably connected for said microprocessor to read said information;

an operator control terminal for supplying said microprocessor with instruction not contained with said PROM, and operably connected to said microprocessor;

an operator indicator panel for manually monitoring the system operably connected to said microprocessor;

a data link transmitter for transmitting data from said microprocessor to said receiving means to control said elevation scan, operably connected to said microprocessor;

a serial data link connected to said data link transmitter;

a data link receiver connected to said serial data link;

a programmable read only memory containing phase/scan angle information connected to said data link receiver for receiving a signal therefrom; and

having an output to said receiving means;

a signal simulator for testing said tuning network and said microprocessor connected to said data link receiver to receive on-off signal;

means connected to said signal simulator for coupling said signal into said tuning network;

an antenna power supply monitor connected to said signal simulator on-off input;

an antenna selector switch connected between the output of said receiving means and the input of said tuning network; and

means for passing a selection signal to said selector switch from said data link receiver, connected therebetween.

7. A circuit according to claim 1 wherein said tuning network comprises:

a plurality of hetrodyning stages wherein a received radio frequency signal is beat to a lower frequency;

a demodulator for extracting data from said signal and having an extracted data stream as an output;

a frequency discriminator, receiving a signal from said hetrodyning states, having as an output to said microprocessor an error signal equivalent to the difference between the tuned frequency and the optimum tuneable frequency;

means for disconnecting said frequency discriminator when no signal is received;

an automatic gain control loop electrically connected between said demodulator and one of said hetrodyning stages, and connected to said microprocessor so as to receive an on-off signal; and

a voltage controlled oscillator receiving a control voltage from said microprocessor.

8. A circuit according to claim 1 wherein said tuning network comprises:

a first bandpass filter electrically connected to the output of said receiving means;

a limiter electrically connected to said bandpass filter;

a low noise amplifier electrically connected to said limiter;

a first mixer electrically connected to said low noise amp;

a first local oscillator electrically connected to said first mixer and providing input thereto;

a first IF amp electrically connected to said first mixer;

a second IF amp electrically connected to said first IF amp;

a second mixer connected to said second IF amp;

a second local oscillator electrically connected to and providing input to said second mixer;

a second bandpass filter electrically connected to said mixer;

an automatic gain control amplifier electrically connected to the output of said filter;

a third mixer electrically connected to the output of said automatic gain control amplifier;

a voltage controlled oscillator connected to and providing input to said third mixer, also connected to and receiving input from said controlling means;

a fifth amplifier electrically connected to said third mixer output;

a demodulator/automatic frequency control discriminator electrically connected to said fifth amplifier and providing a data stream and frequency error through electrical connection to said controlling means; and

an automatic gain control loop electrically connected between said demodulator and said automatic gain control amplifier and receiving on-off commands through an electrical connection to said controlling means.

9. A circuit according to claim 8 wherein said demodulator and frequency discriminator comprises:

a detector for demodulation of input signals;

a post detector amplifier receiving input from said detector;

a threshold comparator for comparing said amplified detector output against a threshold voltage, having an output waveform with a low noise characteristic suitable for use as a data stream input to said microprocessor;

an intermediate frequency coupler for receiving signals at said detector input;

a gated switch, such that said switch remains open until a threshold voltage has been exceeded at said threshold comparator output;

means for connecting said switch and said comparator output; and

a frequency discriminator for sensing the difference between the tuned frequency and the optimum receivable frequency and outputing an error signal accordingly, connected so as to receive input from said IF coupler via said gated switch and having an error signal output to said controlling means.

2. A circuit according to claim one wherein said receiving means comprises:

a vertically oriented array of bicone elements;

a base upon which said array is mounted;

an electronics chassis in said base;

a corporate radio frequency feed network mounted in said chassis;

a plurality of phase shifters operably connected to said feed network;

coaxial cables, each connecting an individual array element and a phase shifter, said cables being routed through the center of said array;

means for searching for overhead signals, mounted atop said array;

a switch connected to said radio frequency feed network for selecting reception via said array or said searching means; and

a coaxial cable, routed through the center of said array connecting said selector switch and said searching means.

3. A circuit according to claim 2 wherein said array is housed within a cylindrical radome, which serves as support and as a polarizer, and which is fastened to said base.

4. A circuit according to claim 3 wherein said searching means is enclosed by a hemispherical radome mounted atop said cylindrical radome.

5. A circuit according to claim 2 wherein said searching means is a simple crossed dipole antenna.

10. A method of signal acquisition and tracking utilizing a microprocessor controlled electrically scanned antenna and receiver system comprising the steps of:

searching a frequency range while varying the antenna pattern elevation in excess of 90°

;

validating any signal received from said search; and

tracking said validated signal.

11. A method according to claim 10 wherein said searching step comprises the steps of:

producing an antenna pattern that is omnidirectional in azimuth and directional in elevation;

varying the frequency to be received across the frequency range to be searched while holding the elevation of the antenna pattern constant;

increasing the elevation of the antenna pattern by one beam width when said frequency varying step has been completed; and

repeating said frequency varying and increasing steps to search for the desired frequency from sub-horizon to zenith in predetermined increments.

12. A method according to claim 10 wherein said validating step comprises the steps of:

filtering received signals for desired characteristics;

providing said microprocessor with reference information as to the desired signal modulation format;

comparing signals received in said search step against said reference information; and

rejecting signals which are not comparable to said reference information.

13. A method according to claim 10 wherein said tracking step comprises the steps of:

angle tracking by beam switching any validated signal for so long as said signal is present;

frequency tracking said validated signal concurrently with said angle tracking;

applying automatic gain control to said signal; and

extracting data from said signal.

14. A method according to claim 13 wherein said angle tracking comprises the steps of:

determining in said microprocessor, the portion of a cycle of the received signal during which the data encoded thereon is least significant or reliable;

momentarily increasing the angle of elevation of the antenna pattern during said portion of one cycle of the received signal;

sampling and storing the received signal strength during said momentary increase in elevation angle;

momentarily decreasing the angle of elevation of the antenna pattern during the same portion of the next cycle of the received signal;

sampling and storing the received signal strength during said momentary decrease in elevation angle;

comparing in said microprocessor, said sampled signal strengths to each other; and

adjusting the antenna elevation pattern toward the stronger signal to achieve optimum signal reception.

16. A method according to claim 11 wherein increasing the elevation of the antenna pattern comprises:

predetermining phase relationship across said antenna'"'"'s aperture in accordance with a range of desired antenna pattern elevations;

addressing said phase relationship in a memory accessible to said microprocessor;

determining within said microprocessor, which elevation is currently desired; and

instructing, via said microprocessor, said memory to output the phase relationship for a desired elevation to said antenna.

17. A method according to claim 10 wherein said antenna patterns are created by the use of a specialized antenna comprising:

a collinear array of bicone elements;

a base on which said array is mounted;

a 3 bit PIN diode phase shifter for each of said bicone elements, each phase shifter mounted in said base;

a coaxial cable connecting each element with its associated phase shifter, being mounted axially along the center of the array;

a cylindrical radome which also serves as a polarizer, mounted about said array and connected to said base;

a crossed dipole antenna mounted above said array on said cylindrical radome;

a hemispherical radome covering said dipole fastened to said cylindrical radome;

a switch for choosing between said dipole and said array as an active antenna, mounted in said base;

a coaxial cable connecting said dipole to said switch;

means for outputting received signals to said microprocessor/receiver;

means for inputting antenna scan control data from said microprocessor to said phase shifters.

15. A method of signal acquisition and tracking utilizing a microprocessor controllable electrically scanned antenna/receiver unit and a signal in a known frequency range and modulation format comprising the steps of:

producing an antenna pattern that is omnidirectional in azimuth and directional in elevation;

varying the frequency received across the frequency range to be searched while holding the elevation of the antenna pattern constant;

increasing the elevation of the pattern one beam width when said varying step has been completed;

repeating said varying and increasing steps to search for the desired frequency from sub-horizon elevation to +60°

of elevation in elevation increments equivalent to one band width;

producing an omnidirectional antenna pattern above +60°

of elevation;

tuning said receiver across the frequency range to be searched while the antenna pattern is above +60°

elevation;

providing said microprocessor with reference information as to said desired signal'"'"'s modulation format;

comparing any received signal with said reference;

angle tracking any signal which by comparison matches the reference for as long as the signal is present;

frequency tracking said matched signal concurrently with said angle tracking; and

extracting data from said tracked signal.

18. An antenna system for use with a microprocessor as a scan controller, having a radiation pattern that is omnidirectional in azimuth and directed in elevation comprising:

a base;

an array of bicone elements vertically mounted on said base;

a plurality of coaxial cables, each connected to a bicone element and running down the central axis of said array;

a plurality of phase shifters, each connected to one of said coaxial cables, and mounted in said base;

a cylindrical radome which also serves as a polarizer mounted about said array and fastened to said base;

a crossed dipole antenna mounted above said array and fastened to the top of said cylindrical radome;

a hemispherical radome covering said dipole and fastened to said cylindrical radome;

a switch for choosing either said array or said dipole as the active antenna;

a coaxial cable connecting said switch and said dipole;

a chassis mounted within said base, an RF feed network marked as said chassis and connected to said phase shifter;

scan electronics connected to phase shifter and having an input from said microprocessor.