Power source circuit

• US 4,479,085 A
• Filed: 12/09/1981
• Issued: 10/23/1984
• Est. Priority Date: 12/19/1980
• Status: Expired due to Fees

• Current Assignee: Iwasaki Tsushinki Kabushiki Kaisha
• Original Assignee: Iwasaki Tsushinki Kabushiki Kaisha
• Inventors: Uchida, Seiya, Ashikaga, koichi
• Primary Examiner(s): Shoop, William M.
• Assistant Examiner(s): STERRETT, JEFFREY L
• Application Number:
  US06/329,029
• Time in Patent Office: 1,049 Days
• Field of Search: 323/273, 323/280, 323/281
• US Class Current: 323/280
• CPC Class Codes: G05F 1/575 characterised by the feedback circuit
• CPC Class Codes: H04M 9/003 Transmission of control signals from or to the key telephone set; signalling equipment at key telephone set, e.g. keyboard or display equipment keyboard equipment in semi-automatic systems H04M3/62

Abstract

A power source circuit having a reference voltage generating circuit for generating a DC reference voltage a current output circuit provides across output lines a current proportional to an input voltage, and an error voltage integration circuit is provided for integrating a voltage proportional to a difference between the DC reference voltage and the voltage across the output lines at a required integration time constant to apply the integrated output as the input voltage to a current output circuit. The integration time constant is set so that an output terminal connected to the output lines may have a low output impedance in terms of direct current to maintain a predetermined constant DC output voltage and have a high output impedance with respect to an AC signal applied to the output lines.

Claims

1. A power source circuit comprising:

input lines for receiving a DC input current;

reference voltage generating means provided across said input lines for generating a DC reference voltage;

output lines for applying a DC output current to a load;

current output means operatively connected between one of said input lines and one of said output lines and comprising a first transistor circuit having a control input terminal and a current path including a first resistor for providing at said output lines said DC output current in response to said DC input current; and

error voltage integration means comprising a second transistor circuit for receiving a breeder voltage of a voltage across said output lines, a third transistor circuit for receiving said DC reference voltage and defining a differential amplifier together with said second transistor circuit to apply a control current to said control input terminal, a second resistor connected between transistors of the second and third transistor circuits and through which the control current is applied to said control input terminal, and a capacitor connected across said one of the input lines and said control input terminal, said error voltage integration means operating so that a voltage proportional to a difference between said DC reference voltage and said breeder voltage at a required integration time constant operates to develop said control current, said required integration time constant being determined by said first resistor, said second resistor and said capacitor so that said output lines have a low output impedance in terms of direct current to maintain across said load a predetermined constant DC output voltage and a high output impedance with respect to an AC signal applied to said output lines.