Audio amplifier

• US 4,483,016 A
• Filed: 09/23/1982
• Issued: 11/13/1984
• Est. Priority Date: 09/23/1982
• Status: Expired due to Fees

• Current Assignee: Kelvin Shih, Peter A Hochstein
• Original Assignee: Kelvin Shih, Peter A Hochstein
• Inventors: Hochstein, Peter A., Shih, Kelvin
• Primary Examiner(s): Rubinson, Gene Z.
• Assistant Examiner(s): Dwyer, James L.
• Application Number:
  US06/422,260
• Time in Patent Office: 782 Days
• Field of Search: 330/264, 330/253, 330/255, 330/269, 381/120
• US Class Current: 381/120
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence
• CPC Class Codes: H03F 1/308 using MOSFET
• CPC Class Codes: H03F 2200/516 Some amplifier stages of an amplifier use supply voltages of different value
• CPC Class Codes: H03F 2203/30048 the SEPP amplifier has multiple SEPP outputs from paralleled output stages coupled in one or more outputs
• CPC Class Codes: H03F 3/3008 Bifet SEPP output stages
• CPC Class Codes: H03F 3/3022 CMOS common source output SEPP amplifiers H03F3/3008 takes precedence
• CPC Class Codes: H03F 3/3059 with symmetrical driving of the end stage
• CPC Class Codes: H03F 3/3066 the collectors of complementary power transistors being connected to the output

Abstract

An amplifier circuit for a speaker 12. The circuit includes an operational amplifier 16 connected to a supply rail 24 and a supply rail 26 through a regulator 28 and a regulator 30. The circuit is characterized by a P channel MOS-FET 32 having a source 34 connected to the rail 24 and a drain 36 connected to the speaker 12 and a gate 38, and an N channel MOS-FET 40 having a source 42 connected to the rail 26 and a drain 44 connected to the speaker 12 and a gate 46. A NPN stage 48 is responsive to the output 56 of the amplifier 16 for establishing a voltage differential between the gate 38 of the MOS-FET 32 and the rail 24 to drive the MOS-FET 32 into conduction. A PNP stage 50 is responsive to the output 56 of the amplifier 16 for establishing a voltage differential between the gate 46 of the MOS-FET 40 and the rail 26 to drive the MOS-FET 40 into conduction. The stages 48, 50 are connected to ground 52. A feedback circuit 94 interconnects the drain 36 of the MOS-FET 32 and the ground 52 side of the stage 48, and a feedback circuit 96 interconnects the drain 44 of the MOS-FET 40 and the ground 52 side of the stage 50. A feedback circuit 98 interconnects the speaker 12 and the amplifier 16 for returning a portion of the output voltage to the amplifier 16 to cause the output signal to track the signal at the input to the amplifier 16. A PNP transistor 68 has its base 72 connected to the source 34 of the MOS-FET 32 and its emitter 70 connected to the rail 24 and its collector 76 connected to the output 12, and an NPN transistor 82 has its base 84 connected to the source 42 of the MOS-FET 40 and its emitter 87 connected to the rail 24 and its collector 90 connected to the output 12.

Claims

1. An audio amplifier circuit of the AB class including differential amplifier stage (16) having an input (17) for receiving and processing an input auido signal to provide a primary audio signal, a circuit transducer output (12), a primary amplification stage for receiving said primary audio signal and amplifying same to provide a transducer signal to said circuit transducer output (12), bipolar power supply connections (24, 26) for supplying electrical current, said AB class amplifier circuit characterized by said primary amplification stage including at least two MOS-FETS (metal oxide semiconductor-field-effect transistors) (32, 40) in common source connection between said power supply connections and said circuit transducer output (12) and a level-shifting driver stage (48, 50) for driving each MOS-FET.

2. A circuit as set forth in claim 1 further characterized by said MOS-FETS (32, 40) having sources (34, 42) connected to said power supply connections (24, 26) gates (38, 46) having voltage applied thereto referenced to said power supply connections (24, 26) to establish a voltage differential between said gates (38, 46) and said sources (34, 42) to cause conduction of said MOS-FETS, said MOS-FETS (32, 42) having drains (36, 44) connected to said circuit transducer output (12).

3. A circuit as set forth in claim 2 wherein the output of said differential amplifier stage (16) is ground referenced and further characterized by each of said level-shifting driver stages (48, 50) converting output of said differential stage (16) into corresponding voltage differentials between each MOS-FET gate (38, 46) and associated power connection (24, 26) for each MOS-FET (32, 42) to operate said MOS-FETS together in class AB.

4. A circuit as set forth in claim 3 further characterized by including a system feedback stage (98) interconnecting said transducer output (12) and said input (17) to said differential amplifier input stage (16) for applying a portion of the transducer signal voltage to said input (17) to cause the amplified transducer signal to faithfully track the input audio signal.

5. A circuit as set forth in claim 3 further characterized by said power supply connection (24, 26) having a positive voltage rail (24) and a negative voltage rail (26), said differential amplifier stage (16) including an operational amplifier (16) connected having inputs (15, 17), said operational amplifier (16) having a positive supply side connected to said positive supply rail (24) and a negative supply side connected to said negative supply rail (26), through positive (28) and negative (30) voltage regulating circuits respectively.

6. A circuit as set forth in claim 5 further characterized by said MOS-FET including a P channel MOS-FET (32) having its source (34) connected to said positive supply rail (24), and an N channel MOS-FET (40) having its source (42) connected to said negative supply rail (26), said P and N MOS-FETS connected to said circuit transducer output (12), said level-shifting driver stage (48) including a NPN transistor (120) interconnecting the output of said operational amplifier (16) and said positive supply rail (24) and ground and said gate (38) of said P channel MOS-FET (32), said level-shifting driver stage (50) including a PNP transistor (134) interconnecting output of said operational amplifier (16) and said negative supply rail (26) and ground and said gate (44) of said N channel MOS-FET (40).

7. A circuit as set forth in claim 6 further characterized by including a positive side feedback circuit (94) interconnecting said drain (36) of said P channel MOS-FET (32) and the ground side of said NPN driver stage (48) and a negative side feedback circuit (96) interconnecting said drain (44) of said N channel MOS-FET (40) and the ground side of said PNP driver stage (50).

8. A circuit as set forth in claim 7 wherein said NPN driver stage (48) includes a bipolar transistor (120) having its base (122) connected to said output of said operational amplifier (16) and its collector (124) connected to said gate (38) of said P channel MOS-FET (32) to said positive supply rail (24) and its emitter (130) connected to ground (52), and said PNP driver stage (50) includes a bipolar transistor (134) having its base (136) connected to said output of said operational amplifier (16) and its collector connected to said gate (46) of said positive channel MOS-FET (40) to said negative supply rail (26) and its emitter (144) connected to ground (52).

9. A circuit as set forth in claim 8 further characterized by including a PNP bipolar transistor (68) having its emitter (70) connected to said positive supply rail (24) and its base (72) connected to said source (34) of said P channel MOS-FET (32) and its collector (76) connected to said circuit transducer output (12), and an NPN bipolar transistor (82) having its emitter (87) connected to said negative supply rail (26) and its base (84) connected to said source (42) of said N channel MOS-FET (40) and its collector (90) connected to said circuit transducer output (12).

10. An amplifier circuit of the AB class comprising:

a transducer output (12), a conventional operational amplifier (16) having an audio signal input (17), a power connection including a positive supply rail (24) and a negative supply rail (26), a positive voltage regulator (28) interconnecting said positive rail (24) and said operational amplifier (16) for providing positive voltage to said operational amplifier (16), a negative voltage regulator (30) interconnecting said negative rail (26) and said operational amplifier (16) for providing negative voltage to said operational amplifier (16), a P channel MOS-FET (32) having a source (34) connected to said positive rail (24) and a drain (36) connected to said transducer output (12) and a gate (38), an N channel MOS-FET (40) having a source (42) connected to said negative rail (26) and a drain (44) connected to said transducer output (12) and a gate (46), an NPN voltage level-shifting and driver stage (48) responsive to the output (56) of said operational amplifier (16) for establishing a voltage differential between said gate (38) of said P channel MOS-FET (32) and said positive rail (24) to drive said P channel MOS-FET (32) into conduction and isolated from being in driving relationship with said N channel MOS-FET, a PNP voltage level-shifting and driver stage (50) responsive to the output (56) of said operational amplifier (16) for establishing a voltage differential between said gate (46) of said N channel MOS-FET (40) and said negative rail (26) to drive said N channel MOS-FET (40) into conduction and isolated from being in driving relationship with said P channel MOS-FET, said driver stages (48,

     50) having ground leads being connected to ground (52).

11. A circuit as set forth in claim 10 further characterized by including a positive side feedback circuit (94) interconnecting said drain (36) of said P channel MOS-FET (32) and said ground lead of said NPN driver stage (48), and a negative side feedback circuit (96) interconnecting said drain (44) of said N channel MOS-FET (40) and said ground leads of said PNP driver stage (50).

12. A circuit as set forth in claim 11 further characterized by including a system feedback circuit (98) interconnecting said circuit transducer output (12) and said operational amplifier (16) for returning a portion of the transducer output voltage to said operational amplifier (16) to cause the circuit transducer output signal to faithfully track the signal at said audio input.

13. A circuit as set forth in claim 12 further characterized by including an NPN auxiliary transistor (68) having its base (72) connected to said source (34) of said P channel MOS-FET (32) and its emitter (70) connected to said positive supply rail (24) and its collector (76) connected to said circuit transducer output (12), and a PNP auxiliary transistor (82) having its base (84) connected to said source (42) of said N channel MOS-FET (40) and its emitter (87) connected to said negative supply rail (24) and its collector (90) connected to said circuit transducer output (12).

14. A circuit as set forth in claim 12 further characterized by including a positive voltage divider (54) coupled between said positive voltage regulator (28) and the output (56) of said operational amplifier (16) and connected to said NPN driver stage (48), and a negative voltage divider (60) coupled between said negative voltage regulator (30) and the output (56) of said operational amplifier (16) and connected to said PNP driver stage (50).

15. A circuit as set forth in claim 14 further characterized by an including quiescent current regulating circuit (64) coupled between said driver stages (48, 50) for maintaining a collector-emitter through driver stages (48, 50) current flow at a zero output from said operational amplifier (16).

16. A circuit as set forth in claim 15 further characterized by said NPN driver stage (48) including a driver NPN transistor (120) having a base (122) coupled to said quiescent current regulating stage (64) and said positive voltage divider (54) and a collector (124) connected to said positive supply rail (24) to said gate (38) of said P channel MOS-FET (32) and an emitter (130) connected to ground (52), and by said PNP driver stage (50) including a driver PNP transistor (134) having a base (136) coupled to said quiescent regulating current stage (64) and said negative voltage divider (60) and a collector (138) connected to said negative supply rail (26) to said gate (46) of said N channel MOS-FET (40) and an emitter (144) connected to ground (52).

17. A circuit as set forth in claim 16 further characterized by each driver stage (48, 50) including a first resistor (128, 142) between said gate (38, 46) of the associated MOS-FET (32, 40) and the associated voltage supply (124, 26) rail and a second resistor (126, 140) between said gate (38, 46) of the associated MOS-FET (32, 40) and the associated driver transistor (120, 134), said second resistors (126, 140) being commonly connected to ground (52).

18. A circuit as set forth in claim 17 further characterized by each driver stage (48, 50) including a zener diode (148, 150) coupled between the associated voltage supply rail (24, 26) and said gate (38, 46) of the associated MOS-FET (32, 40).

19. A circuit as set forth in claim 17 further characterized by said positive side feedback circuit (94) including a capacitor (158) and resistor (156) in parallel between said drain (36) of said P channel MOS-FET (32) and said emitter (130) of the said driver NPN transistor (120) and by said negative side feedback circuit (96) including a capacitor (162) and resistor (160) in parallel between said drain (44) of said N channel MOS-FET (40) and said emitter (138) of said driver PNP transistor (134).

20. A circuit as set forth in claim 19 further characterized by said NPN driver stage (48) including a resistor (132) between said positive side feedback circuit (94) connection to said emitter (130) of said NPN transistor (120) and ground (52), and said PNP driver stage (50) including a resistor (146) between said negative side feedback circuit (96) connection to said emitter (144) of said PNP transistor (134) and ground (52).

21. A circuit as set forth in claim 20 further characterized by said system feedback circuit (98) including a resistor (166) and capacitor (164) in parallel and a ground resistor (22) connected to ground.

22. A circuit as set forth in claim 21 further characterized by including a capacitor (168) coupled between the output of said operational amplifier (16) and the input (17) to said operational amplifier (16) from said system feedback circuit.

23. A circuit as set forth in claim 22 further characterized by said quiescent current regulating circuit (64) including a pair of resistors (152, 154) in series between the inputs (58, 62) to said bases (122, 136) of said driver transistors (120, 134), one of said resistors (154) having an adjustable resistance.

24. A circuit as set forth in claim 17 further characterized by including a PNP auxiliary transistor (68) having its base (72) connected through a resistor (74) to said source (34) of said P channel MOS-FET (32) and its emitter (70) connected to said positive voltage supply rail (24) and its collector (76) connected to said circuit transducer output (12) and resistor (78) disposed in the connection between said source (34) of said P channel MOS-FET (32) and said positive voltage supply rail (24), and by including an NPN auxiliary transistor (82) having its base (84) connected through a resistor (86) to said source (42) of said N channel MOS-FET (40) and its emitter (87) connected to said negative voltage supply rail (26) and its collector (90) connected to said transducer output (12) and a resistor (88) disposed in the connection between said source (42) of said N channel MOS-FET (40) and said negative voltage supply rail (26).

25. An amplifier circuit comprising:

a circuit of the AB class, transducer output (12), an operational amplifier (16) having an audio signal input (17) and output referenced to ground, a power connection including a positive voltage supply rail (24) and a negative voltage supply rail (26), a positive voltage regulator (28) interconnecting said positive rail (24) and said operational amplifier (16) for providing positive voltage to said operational amplifier (16), a negative voltage regulator (30) interconnecting said negative rail (26) and said operational amplifier (16) for providing positive voltage to said operational amplifier (16), a P channel MOS-FET (32) having a source (34) connected to said positive rail (24) and a drain (36) connected to said circuit transducer output (12) and a gate (38), an N channel MOS-FET (40) having a source (42) connected to said negative rail (26) and a drain (44) connected to said circuit transducer output (12) and a gate (46), a driver NPN bipolar transistor (120) having a base (122) coupled to the output of said operational amplifier (16) and a collector (124) coupled to said gate (38) of said P channel MOS-FET (32) to said positive voltage rail (24) and an emitter (36) connected to ground (52) for shifting the ground referenced voltage to establish a voltage differential between said gate (38) of said P channel MOS-FET (32) and said positive voltage rail (24) to drive said P channel MOS-FET (32) into conduction and isolated from being in driving relationship with said N channel MOS-FET, a driver PNP bipolar transistor (134) having a base (136) coupled to the output of said operational amplifier (16) and a collector (138) coupled to said gate (46) of said N channel MOS-FET (40) to said negative voltage rail (26) and an emitter (144) connected to ground (52) for shifting the ground referenced voltage to establish a voltage differential between said gate (46) of said N channel MOS-FET (40) and said negative voltage rail (26) to drive said N channel MOS-FET (40) into conduction and isolated from being in driving relationship with said P channel MOS-FET.

26. A circuit as set forth in claim 25 further characterized by including a positive side feedback circuit (94) interconnecting said drain (36) of said P channel MOS-FET (32) and said emitter (130) of said NPN transistor (120) and a negative side feedback circuit (96) interconnecting said drain (44) of said N channel MOS-FET (40) and said emitter (144) of said PNP transistor (134).

27. A circuit as set forth in claim 25 further characterized by including a system feedback circuit interconnecting said circuit transducer output (12) and the input (17) to said operational amplifier (16) for returning a portion of the circuit transducer output voltage to said operational amplifier (16) to cause the circuit transducer output signal to faithfully track the signal at said audio input.