Pattern recognition system using switched capacitors
First Claim
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1. In a pattern recognition system the combination comprising:
- a multiplexer having N inputs and an output, each one of said N inputs being adapted to receive an input signal;
M band pass filters, each filter having a signal input connected to said multiplexer and a signal output, and each filter including a capacitor CF i and means for switching the capacitor at a particular frequency fF i for producing a desired particular equivalent resistance within each filter, where 1≦
i≦
M;
means connecting said filter signal inputs to said multiplexer output;
M integrators, one integrator per filter, each integrator having a signal input and a signal output and each integrator including a capacitor CI i and means for switching the capacitor at a particular frequency fI i for producing a desired particular equivalent resistance within each integrator;
M rectifying means, one rectifying means per filter, each rectifying means being connected between the signal output of a filter and the signal input of an integrator;
a summing amplifier having a summing node; and
M weighting elements, one weighting element per integrator, each weighting element having a signal input and a signal output and including a capacitor CW i and means for switching the capacitor at a particular frequency fW i for producing a desired particular equivalent resistance in the signal path between said signal input and said signal output of each weighting element;
means connecting the signal input of each weighting element to its corresponding integrator output; and
means connecting the signal output of each weighting element to said summing node;
where M and N are integers greater than one.
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Abstract
A pattern recognition system includes a filter bank, coupled via rectifying elements to integrators which are coupled via different weighting elements to the summing nodes of a summing amplifier. The filter bank, integrators, and weighting elements include switched capacitors enabling the manufacture of the filters, rectifiers, integrators and weighting elements on a monolithic integrated circuit chip. The frequencies at which the capacitors are switched are programmable enabling the system to be easily "retuned".
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Citations
11 Claims
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1. In a pattern recognition system the combination comprising:
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a multiplexer having N inputs and an output, each one of said N inputs being adapted to receive an input signal; M band pass filters, each filter having a signal input connected to said multiplexer and a signal output, and each filter including a capacitor CF i and means for switching the capacitor at a particular frequency fF i for producing a desired particular equivalent resistance within each filter, where 1≦
i≦
M;means connecting said filter signal inputs to said multiplexer output; M integrators, one integrator per filter, each integrator having a signal input and a signal output and each integrator including a capacitor CI i and means for switching the capacitor at a particular frequency fI i for producing a desired particular equivalent resistance within each integrator; M rectifying means, one rectifying means per filter, each rectifying means being connected between the signal output of a filter and the signal input of an integrator; a summing amplifier having a summing node; and M weighting elements, one weighting element per integrator, each weighting element having a signal input and a signal output and including a capacitor CW i and means for switching the capacitor at a particular frequency fW i for producing a desired particular equivalent resistance in the signal path between said signal input and said signal output of each weighting element; means connecting the signal input of each weighting element to its corresponding integrator output; and means connecting the signal output of each weighting element to said summing node;
where M and N are integers greater than one. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A pattern recognition circuit comprising:
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a multiplexer having N inputs and an output, each one of said N inputs being adapted to receive the output of a sensor; a programmable filter bank comprised of M band pass filters, each band pass filter having a signal input and a signal output, said signal inputs of said band pass filters being connected to said multiplexer output and each filter including at least one switched capacitor for forming the equivalent resistance of its RC time constant; a programmable integrating bank, comprised of M integrators, one integrator per filter, each integrator having a signal input and a signal output, each integrator including a switched capacitor for producing the equivalent resistance of the integrator'"'"'s RC time constant; M rectifying means, one rectifying means per filter, each rectifying means being connected between the output of a filter and the input of an integrator; a summing amplifier having a summing node; and M programmable weighting elements, one weighting element per integrator, each weighting element comprising a switched capacitor connected between the output of its corresponding integrator and said summing node;
where M and N are integers greater than one.
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11. In a pattern recognition system including a plurality of filters coupled via a plurality of rectifying elements to a plurality of integrators which are coupled via a plurality of weighting elements to the summing node of an amplifier, and where each one of said filters, integrators and weighting elements has first and second circuit points between which an ohmic impedance is to be produced, the improvement comprising:
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a multiplicity of "switched" capacitors each one of said "switched" capacitors having first and second plates; each one of said plurality of filters, integrators and weighting elements including at least one "switched" capacitor coupled at one plate via a first switch means to its said first circuit point and via a second switch means to its said second circuit point for producing an equivalent ohmic impedance therebetween; means coupling the other plate of each one of said switched capacitors in circuit with other components of said plurality of filters, integrators and weighting elements; and means coupled to said switch means associated with said switched capacitors for controlling the rate at which said switch means are opened and closed for determining the equivalent resistance between the first and second circuit points associated with each switched capacitor.
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Specification