Semiconductor device

• US 4,484,212 A
• Filed: 12/29/1981
• Issued: 11/20/1984
• Est. Priority Date: 01/14/1981
• Status: Expired due to Term

• Current Assignee: Tokyo Shibaura Denki Kabushiki Kaisha (Toshiba Corporation)
• Original Assignee: Tokyo Shibaura Denki Kabushiki Kaisha (Toshiba Corporation)
• Inventors: Komatsu, Shigeru, Nakamura, Michio, Fujita, Katsuji
• Primary Examiner(s): Edlow, Martin H.
• Assistant Examiner(s): Jackson, Jr., Jerome
• Application Number:
  US06/335,712
• Time in Patent Office: 1,057 Days
• Field of Search: 357/51, 357/26, 357/68, 338/2, 338/3, 338/5, 338/13, 73/DIG. 4
• US Class Current: 257/536
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/585 comprising conductive layers or plates or strips or rods or rings H01L23/60, H01L23/62, H01L23/64, H01L23/66 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 257/925 Bridge rectifier module
• CPC Class Codes: Y10S 73/04 Piezoelectric

Abstract

A semiconductor device comprising a semiconductor substrate having at least two resistor elements, wherein said resistor elements have a specific resistance ratio relative to each other, an insulation layer formed on a major surface of said semiconductor substrate, a circuit wiring layer formed on said insulation layer covering a portion of said insulation layer which corresponds to at least one of said resistor elements, and a dummy wiring layer made of the same material as that of the circuit wiring layer and formed on the insulation layer covering that portion of said insulation layer which corresponds to the resistor element or elements not covered by said circuit wiring layer, and where the ratio of an overlapping area of one resistor element in said circuit wiring layer and an overlapping area of the other resistor element and said dummy wiring layer is equal to a resistance ratio of said resistor elements.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other;

an insulation layer formed on a major surface of said semiconductor substrate;

a circuit wiring layer formed on said insulation layer, covering a portion of said insulation layer which corresponds to at least one of said resistor elements; and

a dummy wiring layer formed on said insulation layer, covering that portion of said insulation layer which corresponds to the resistor element or elements not covered by said circuit wiring layer, and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.

2. A semiconductor device according to claim 1, wherein said circuit wiring layer covers a portion of said insulation layer which corresponds to one of said two resistor elements;

and

said dummy wiring layer covers a portion of said insulation layer which corresponds to the other of said two resistor elements not covered by said circuit wiring layer.

3. A semiconductor device according to claim 2, wherein a ratio of an overlapping area of said resistor element and said circuit wiring layer and an overlapping area of said other resistor element and said dummy wiring layer is equal to a ratio of a resistance value of said one resistor element and that of said other resistor element.

4. A semiconductor device according to claim 1, wherein a ratio of an overlapping area of said resistor element covered by said dummy wiring layer and said dummy wiring layer and an overlapping area of said resistor element covered by said circuit wiring layer and said circuit wiring layer is equal to a ratio of a resistance value of said resistor element covered by said dummy wiring layer and said resistance value of said resistor element covered by said circuit wiring layer.

5. A semiconductor device according to claims 1, 2, 3 or 4, wherein said circuit wiring layer and said dummy wiring layer are made of the same material.

6. A semiconductor device according to claim 5, wherein said material is corrosion resistive alloy.

7. A semiconductor device according to claim 5, wherein said material is a poly crystal silicon.

8. A semiconductor device according to claim 5, wherein said material is metal silicide.

9. A semiconductor device according to claim 6, wherein said corrosion resistive alloy is one selected from Al - Si - Cu, Al - Si and Al - Ti.

10. A semiconductor device of the multilayer type comprising:

a semiconductor substrate having at least two resistor elements formed therein, wherein said resistor elements formed therein have a specific resistance ratio relative to each other;

a multi-layer arrangement of insulation layer-conductive wiring layer in which insulation layers and conductive wiring layers are alternately superimposed in this order on a major surface of said semiconductor substrate;

said conductive wiring layer including a circuit wiring layer and a dummy wiring layer;

said circuit wiring layer being formed to cover one of said two resistor elements on the lower side of said insulation layer; and

said dummy wiring layer being formed to cover said resistor element not covered by said circuit wiring layer and wherein said circuit wiring layer causes less stress on said resistance element not covered by said circuit wiring layer than on said resistance element covered by said circuit wiring layer, said resistance ratio of said resistance elements formed therein being stress-dependent.

11. A semiconductor device according to claim 10, wherein said circuit wiring layer covers a portion of said insulation layer which corresponds to one of said two resistor elements;

and

said dummy wiring layer covers a portion of said insulation layer which corresponds to the other of said two resistor elements not covered by said circuit wiring layer.

12. A semiconductor device according to claim 11, wherein a ratio of an overlapping area of said one resistor element and said circuit wiring layer and an overlapping area of said other resistor element and said dummy wiring layer is equal to a ratio of a resistance value of said one resistor element and that of said other resistor element.

13. A semiconductor device according to claim 10, wherein a ratio of an overlapping area of said resistor element covered by said dummy wiring layer and said dummy wiring layer and an overlapping area of said resistor element covered by said circuit wiring layer and said circuit wiring layer is equal to a ratio of a resistance value of said resistor element covered by said dummy wiring layer and said resistance value of said resistor element covered by said circuit wiring layer.

14. A semiconductor device according to claims 10, 11, 12 or 13, wherein said circuit wiring layer and said dummy wiring layer are made of the same material.

15. A semiconductor device according to claim 14, wherein said material is corrosion resistive alloy.

16. A semiconductor device according to claim 14, wherein said material is a poly crystal silicon.

17. A semiconductor device according to claim 14, wherein said material is metal silicide.

18. A semiconductor device according to claim 15, wherein said corrosion resistive alloy is one selected from Al - Si - Cu, Al - Si and Al - Ti.