Sequential program control system

• US 4,486,832 A
• Filed: 08/21/1981
• Issued: 12/04/1984
• Est. Priority Date: 03/21/1978
• Status: Expired due to Fees

• Current Assignee: Robert Bosch GmbH
• Original Assignee: Robert Bosch GmbH
• Inventors: Haubner, Georg, Wesemeyer, Jurgen
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Malamud, Ronni S.
• Application Number:
  US06/294,986
• Time in Patent Office: 1,201 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/177, 364/140, 364/569
• US Class Current: 713/401
• CPC Class Codes: G05B 19/07 where the programme is defined in the fixed connection of electrical elements, e.g. potentiometers, counters, transistors

Abstract

To provide for uniform timing of program control cycles in which different control cycles have different cycling time, the control cycles being connected in parallel to a program control arrangement, timing elements are connected in the respective signal paths controlling the respective cycles and adding time increments to the signals coursing in the respective paths between the input and the output to at least approximate the coursing time of all signal paths to a uniform time duration; if the coursing time periods of the signals through the respective paths do not differ substantially, a fixed delay can be added to all the coursing times so that the percentage variation between the coursing time of different cycles, considering the overall time, is small.

Claims

1. Sequential program control system combination comprising

a plurality of sequential separate program control units (10, 40, 39), each having a plurality of selectable paths (1 . . . 6) from a signal train input (TC) to a signal train output (18) which are selectively enabled, and in which different paths have different signal coursing time periods,

each of said separate control units responding to selectable command input data (11-14;

17'"'"') addressing at least one of a selected path in said units,

said units providing outputs (15,

     16) in accordance with selected command input data;

means for connecting the signal train output (18) of a first one (10) of the plurality of the separate units to the signal train input of a further one unit (40,

     39) of said plurality of separate units to thereby connect said units in a serial chain and enable the further unit (40,

     39) when a signal train output from the next preceding unit in the serial chain is received;

at least one common time delay element (37) connected in the serial chain connection of said first and further units, and adding a fixed time delay to the signals coursing in said respective paths, which fixed delay is substantially longer than the longest of any one of the signal coursing time periods through any one of said paths, to maintain approximately constant the overall coursing time of the signals through said series connection of the units regardless of the selected path of the signals in any one of the units;

means connecting the signal train output of the serial chain to the signal train input of said serial chain to connect the serial chain in a closed loop having a signal coursing time therein which is essentially independent of the selected signal paths in said units, thereby forming a closed loop serial chain; and

means (C) for applying cyclical signal trains to said closed loop serial chain.

2. System combination according to claim 1, wherein at least one of the units has at least two parallel paths,

and further including at least one individual timing element (35'"'"', 36'"'"') connected into at least one path of at least one of said units (10, 39, 40) and adding a time delay to a signal coursing in said at least one path of such a time period to equalize the coursing time of the selected signal through said at least one path with respect to the coursing time of a signal passing through another parallel path in said at least one unit.

3. System combination according to claim 1, wherein the delay time of said at least one common time delay element is at least about ten times the maximum coursing time period through any one of said paths.

4. System combination according to claim 1, wherein the delay time of said at least one common time delay element (37) is about 20 times the difference between the shortest or longest coursing time through said different paths, and the average coursing time through all the paths.