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End-to-end information memory arrangement in a line controller

  • US 4,488,288 A
  • Filed: 06/25/1982
  • Issued: 12/11/1984
  • Est. Priority Date: 06/25/1982
  • Status: Expired due to Term
First Claim
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1. In a packet communication system for switching packets of digital signals with each of said packets having an address field defining a communication path through said system and a data field and said system comprising:

  • a plurality of terminals;

    the invention comprising;

    processor means;

    packet switching network means operable for establishing path connections for a call setup packet from a first one of said terminals to said processor means in response to the address field of said call setup packet;

    said processor means responsive to a receipt of said call setup packet for supplying address information in the data field of said call setup packet to effect an operation of said network means for the establishment of path connections communicating from said first one of said terminals to a second one of said terminals and to communicate said call setup packet to said second one of said terminals;

    route address means for said first and second ones of said terminals for effecting the storage of said address information following a receipt of said call setup packet at said second terminal; and

    said packet switching network being subsequently operable independent of said processor means under control of said stored address information inserted into subsequent ones of said plurality of packets for establishing path connections between said first and second terminals to communicate said subsequent packet therebetween.

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