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Semiconductor non-volatile memory device

  • US 4,491,859 A
  • Filed: 08/25/1983
  • Issued: 01/01/1985
  • Est. Priority Date: 06/18/1979
  • Status: Expired due to Term
First Claim
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1. A non-volatile memory cell comprising;

  • a memory transistor which includes a floating gate into which information in the form of stored charge can be read, written and erased, and a source, a drain and a channel beneath said floating gate and between said source and said drain, said channel having conductivity type opposite to that of said source and drain;

    a first impurity region located in contact with said drain and electrically separated from said channel by said drain, said first impurity region having the same conductivity type as that of said channel;

    one end of said floating gate being located over said drain at a position near the boundary between said drain and said first impurity region so that hot carriers can reach said floating gate from said boundary for the writing and erasing of said information;

    avalanche means connected to said drain and to said first impurity region, for causing avalanche breakdown of the junction between said drain and first impurity region to provide said hot carriers for said writing and erasing of said information; and

    control means for controlling said avalanche means and the potentials of said source, drain and floating gate so that none of said hot carriers are provided when said information is being read;

    wherein said avalanche breakdown is caused for at least one of said writing and erasing of said information into said memory cell.

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