Memory system using filterable signals

• US 4,491,930 A
• Filed: 06/19/1980
• Issued: 01/01/1985
• Est. Priority Date: 12/28/1970
• Status: Expired due to Term

• Current Assignee: Gilbert P. Hyatt
• Original Assignee: Gilbert P. Hyatt
• Inventors: Hyatt, Gilbert P.
• Primary Examiner(s): Gruber, Felix D.
• Application Number:
  US05/160,872
• Time in Patent Office: 1,657 Days
• Field of Search: 364/602, 364/607, 364/724, 328/14
• US Class Current: 708/3
• CPC Class Codes: B60R 16/0373 Voice control in general G10L
• CPC Class Codes: F21V 23/00 Arrangement of electric circuit elements in or on lighting devices characterised by cooling arrangements F21V29/508
• CPC Class Codes: G01S 15/897 using application of holographic techniques
• CPC Class Codes: G01S 15/8977 using special techniques for image reconstruction, e.g. FFT, geometrical transformations, spatial deconvolution, time deconvolution
• CPC Class Codes: G01S 7/52026 Extracting wanted echo signals Doppler systems G01S15/50; Doppler short range imaging systems G01S15/8979
• CPC Class Codes: G02F 1/13318 Circuits comprising a photodetector
• CPC Class Codes: G03F 9/7049 Technique, e.g. interferometric
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
• CPC Class Codes: G04G 99/006 Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
• CPC Class Codes: G05B 19/351 the positional error is used to control continuously the servomotor according to its magnitude
• CPC Class Codes: G05B 19/408 characterised by data handling or data format, e.g. reading, buffering or conversion of data
• CPC Class Codes: G05B 19/4083 Adapting programme, configuration
• CPC Class Codes: G05B 19/4086 Coordinate conversions; Other special calculations
• CPC Class Codes: G05B 19/409 characterised by using manual data input [MDI] or by using control panel, e.g. controlling functions with the panel; characterised by control panel details or by setting parameters G05B19/408, G05B19/4093 take precedence
• CPC Class Codes: G05B 19/4093 characterised by part programming, e.g. entry of geometrical information as taken from a technical drawing, combining this with machining and material information to obtain control information, named part programme, for the NC machine
• CPC Class Codes: G05B 19/414 Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
• CPC Class Codes: G05B 19/4142 characterised by the use of a microprocessor G05B19/4141 takes precedence
• CPC Class Codes: G05B 2219/33182 Uart, serial datatransmission, modem
• CPC Class Codes: G05B 2219/34023 Risc processor
• CPC Class Codes: G05B 2219/34098 Slope fitting, fairing contour, curve fitting, transition
• CPC Class Codes: G05B 2219/34471 : Program memory is inhibited, not accessible as long as power fails
• CPC Class Codes: G05B 2219/34472 : Configure alterable memory as read only, to avoid erasing
• CPC Class Codes: G05B 2219/35262 : Macro instruction, canned cycles, subroutines, subprogram
• CPC Class Codes: G05B 2219/35263 : Using variables, parameters in program, macro, parametrized instruction
• CPC Class Codes: G05B 2219/35373 : Data storage, buffer
• CPC Class Codes: G05B 2219/35431 : Interactive
• CPC Class Codes: G05B 2219/35436 : Means, manual input, input reference, hand wheel
• CPC Class Codes: G05B 2219/35453 : Voice announcement, oral, speech input
• CPC Class Codes: G05B 2219/35472 : Mode selection
• CPC Class Codes: G05B 2219/35554 : Mirror, other conversions
• CPC Class Codes: G05B 2219/36152 : Panel
• CPC Class Codes: G05B 2219/36333 : Selection from standard forms, shapes, partprograms, enter value for variable
• CPC Class Codes: G05B 2219/36366 : Data, read in, distribution
• CPC Class Codes: G05B 2219/36379 : Read in
• CPC Class Codes: G05B 2219/36503 : Adapt program to real coordinates, software orientation
• CPC Class Codes: G05B 2219/36546 : Memory protection, protected fields
• CPC Class Codes: G05B 2219/41021 : Variable gain
• CPC Class Codes: G05B 2219/42237 : Pwm pulse width modulation, pulse to position modulation ppm
• CPC Class Codes: G05B 2219/45214 : Gear cutting
• CPC Class Codes: G05B 2219/45215 : Thread cutting
• CPC Class Codes: G05B 2219/49221 : Control of scale
• CPC Class Codes: G05B 2219/50047 : Positioning, indexing
• CPC Class Codes: G05B 2219/50048 : Jogging
• CPC Class Codes: G05B 2219/50083 : Power loss, measures again loss of power
• CPC Class Codes: G05B 2219/50151 : Orient, translate, align workpiece to fit position assumed in program
• CPC Class Codes: G06F 13/16 : for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G06J 1/00 : Hybrid computing arrangements digitally-programmed analogue computers G06G7/06
• CPC Class Codes: G07G 1/12 : electronically operated digital data processing aspects G06Q20/00
• CPC Class Codes: G10L 19/00 : Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis in musical instruments G10H
• CPC Class Codes: G11C 11/565 : using capacitive charge storage elements
• CPC Class Codes: G11C 16/3418 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 : Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 19/287 : Organisation of a multiplicity of shift registers
• CPC Class Codes: G11C 19/36 : using multistable semiconductor elements
• CPC Class Codes: G11C 27/00 : Electric analogue stores, e.g. for storing instantaneous values
• CPC Class Codes: G11C 27/04 : Shift registers
• CPC Class Codes: G11C 7/1042 : using interleaving techniques, i.e. read-write of one part of the memory while preparing another part
• CPC Class Codes: G11C 7/16 : Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: Y02P 90/02 : Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A memory system is provided for enhanced operation; such as for increased storage capacity. One disclosed configuration stores signals in overlapping signature signal form and processes the memory output signal with a digital filter processor. Improved filter processor architectures are provided, including low resolution filter processors and process-on-the-fly filter processors.

Claims

1. A memory system comprising:

digital input means for generating a digital signal having a plurality of digital bits;

memory input means for generating a plurality of overlapping signature signals in response to the plurality of digital bits generated with said digital input means, wherein each of the overlapping signature signals overlaps at least one other of the signature signals;

multiplexing means for generating a multiplexed signature signal by combining the plurality of overlapping signature signals from said memory input means;

memory means for storing the multiplexed signature signal generated with said multiplexing means;

memory output means for outputting the multiplexed signature signal stored in said memory means; and

filter output means for filtering the multiplexed signature signal output with said memory output means to generate a digital output signal having a plurality of digital bits.

2. The system as set forth in claim 1 above, wherein the overlapping signature signals generated with said memory input means are overlapping chirp signature signals, wherein the multiplexed signature signal generated with said multiplexing means is a combined plurality of overlapping chirp signature signals, wherein the multiplexed signature signal stored with said memory means is a multiplexed plurality of overlapping chirp signature signals, wherein said memory output means includes means for outputting the multiplexed signature signal as a multiplexed chirp signature signal in response to the stored multiplexed signature signal, and wherein said filter output means includes means for filtering the multiplexed chirp signature signal for generating a digital output signal related to the digital signal generated with said digital input means.

3. The system as set forth in claim 1 above, wherein said memory input means includes means for generating the plurality of overlapping signature signals as a plurality of overlapping chirp signature signals, wherein the multiplexed signature signal stored in said memory means includes a plurality of overlapping chirp signatures, and wherein said filter output means includes means for filtering the multiplexed signature signal to generate the plurality of digital bits as a plurality of non-overlapping digital signals.

4. The system as set forth in claim 1 above, wherein said filter output means includes means for generating a reference signal and means for correlation filtering the reference signal with the multiplexed signature signal to generate the digital output signal.

5. The system as set forth in claim 1 above, wherein said memory output means includes means for outputting the multiplexed signature signal as a plurality of multiplexed signature signal samples and wherein said filter output means includes:

filter operator means for providing a filter operator signal having a plurality of operator samples;

output means for providing a filter output signal, said filtered output signal having a plurality of output signal samples; and

update means for updating a plurality of the output signal samples provided by said output means in response to one of the multiplexed signature signal samples from said output means and the plurality of operator signal samples provided with said filter operator means.

6. A memory system comprising:

digital means for generating a plurality of digital signals;

signature means for generating a plurality of overlapping signature signals in response to the digital signals generated with said digital means;

multiplexing means for generating a multiplexed signature signal in response to the plurality of overlapping signature signals generated with signature means; and

storing means for storing the multiplexed signature signal generated with said multiplexing means.

7. The system as set forth in claim 6 above, wherein said digital means includes a digital processor for generating the plurality of digital signals as a plurality of digital bits of a parallel digital word, wherein said signature means includes a plurality of signature signal generators each responsive to a different one of said plurality of digital bits for providing the plurality of overlapping signature signals, wherein each of the signature signals is related to a different one of said plurality of digital bits, wherein said multiplexing means includes a multiplexer for multiplexing the plurality of overlapping signature signals provided with said signature means to generate the multiplexed signature signal;

and wherein said system further comprises demultiplexing means for generating a plurality of signature signals in response to the multiplexed signature signal stored in said storing means and means for demodulating the plurality of signature signals generated with said demultiplexing means for generating a plurality of digital bits related to the plurality of digital bits generated with said digital processor.

8. A memory system comprising:

digital input means for generating a digital input signal;

memory means for storing a signature signal in response to the digital input signal;

output means for generating a memory output signature signal in response to the signature signal stored in said memory means; and

filter means for generating an output digital signal related to the digital input signal in response to the memory output signature signal generated with said output means.

9. A memory system comprising:

digital input means for generating a plurality of digital signals;

signature input means for generating a plurality of signature signals having a plurality of signatures in response to the plurality of digital signals generated with said digital input means, wherein said plurality of signatures include different signatures therebetween and include overlapping signatures therebetween; and

memory means for storing the plurality of input signature signals generated with said signature input means;

output means for generating a plurality of memory output signals in response to the plurality of signature signals store in said memory means, wherein the plurality of memory output signals include a plurality of different signatures and a plurality of overlapping signatures; and

filter means for filtering the plurality of memory output signals to generate a plurality of digital output signals representative of the plurality of digital input signals generated with said digital input means.

10. A memory system comprising:

digital signal generating means for generating a plurality of digital bits without having overlapping therebetween;

signature signal generating means for generating a plurality of signature signals having overlapping therebetween in response to the plurality of digital bits generated with said digital signal generating means;

memory means for storing the plurality of signature signals generated with said signature signal generating means; and

output means for generating a plurality of digital bits related to the plurality of digital bits generated with said digital signal generating means in response to the plurality of signature signals stored in said memory means.

11. The system as set forth in claim 10 above, wherein said memory means includes a magnetic memory for storing the plurality of signature signals generated with said signature signal generating means;

wherein said magnetic memory includes

write means for recording the plurality of signature signals from said signature signal generating means onto a magnetic recording medium,

a magnetic recording medium for storing the plurality of signature signals recorded with said write means, and

read means for reading the plurality of signature signals stored on said magnetic recording medium; and

wherein said output means includes means for generating the plurality of digital bits in response to the signature signals read with said read means.

12. A memory system comprising;

input means for generating digital input signals;

signature means for generating signature signals in response to the digital input signals generated with said input means;

memory means for storing the signature signals generated with said signature means; and

means for generating digital output signals in response to the signature signals stored in said memory means.

13. A memory system comprising;

input means for generating a plurality of digital input signals;

signature encoding means for generating a plurality of overlapping signature signals in response to the digital input signals generated with said input means;

memory means for storing the overlapping signature signals generated with said signature encoding means; and

signature decoding means for generating digital output signals in response to the signature signals stored in said memory means.

14. The system as set forth in claim 13 above, wherein said input means includes a digital processor for generating the plurality of digital input signals as a plurality of parallel digital bits in a digital word;

wherein said signature encoding means includes a plurality of signature signal generators each responsive to a different one of said parallel digital bits for generating a different signature signal having a signature that is different than signatures of the other signature signals in response to each of said digital bits and a multiplexer for combining the plurality of signature signals into a multiplexed signature signal;

wherein said memory means includes means for storing the overlapping signature signals as the multiplexed signature signal; and

wherein said signature decoding means includes means for reading the multiplexed signature signal stored with said memory means and means for generating the digital output signals by demultiplexing the multiplexed signature signal read with said reading means.

15. A memory system comprising;

digital means for generating a plurality of digital signals;

modulating means for generating a plurality of overlapping signals in response to the digital signals generated with said digital means;

memory means for storing the plurality of overlapping signals generated with said modulating means; and

output means for generating non-overlapping signals in response to the overlapping signals stored in said memory means.

16. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a filter processor for generating a memory output signal in response to filter processing of the signature signals stored in said memory.

17. The system as set forth in claim 16 above, wherein said memory is a magnetic memory for storing the plurality of signature signals in magnetic signal form.

18. The system as set forth in claim 16 above, further comprising a digital processor for generating a plurality of digital bits;

wherein said signature means includes a plurality of signature signal generators each responsive to a different one of the digital bits generated with said digital processor for generating the plurality of signature signals;

wherein each of the signature signals is related to a different one of the digital bits generated with said digital processor;

wherein said signature means further includes means for combining the plurality of signature signals to generate a combined signature signal;

wherein said memory includes means for storing the plurality of signature signals in the form of the combined signature signal; and

wherein said filter processor includes means for filter processing the combined signature signal stored in said memory to generate a plurality of signature signals and means for generating the memory output signal as a plurality of digital bits related to the plurality of digital bits generated with said digital processor in response to the plurality of signature signals filter processed with said filter processing means.

19. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a correlator filter processor for generating a correlation memory output signal in response to correlation processing of a signature signal stored in said memory.

20. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a Fourier filter processor for generating a frequency-related memory output signal in response to Fourier processing of a signature signal stored in said memory.

21. A memory system comprising

signature means for generating a plurality of signature signals each signature signal having a signature different from the signatures of the other signature signals in said plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a filter processor for generating a plurality of memory output signals in response to filter processing of the signature signals stored in said memory, wherein each of the plurality of memory output signals is generated in response to filter processing of a related one of the signature signals stored in said memory.

22. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

an incremental filter processor for generating a memory output signal in response to incremental filter processing of the plurality of signature signals stored with said memory.

23. A memory system comprising:

input means for generating a digital input signal;

modulation means for generating a frequency modulated signal in response to the digital input signal; and

a memory for storing the frequency modulated signal generated with said modulation means.

24. The system as set forth in claim 23 above, further comprising output means for generating a digital output signal in response to the frequency modulated signal stored in said memory.

25. The system as set forth in claim 23 above, wherein said memory is a magnetic memory for storing the frequency modulated signal on a magnetic surface.

26. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a filter processor for generating a memory output signal in response to filter processing of the signature signals stored in said memory, said filter processor including;

sequential input means for generating a sequence of input signal samples in response to the stored signature signals;

filter operator means for generating operator signal samples;

processor means for processing each of the input signal samples from said sequential input means in sequence with a plurality of the operator signal samples from said filter operator means;

output means for providing a plurality of output signal samples; and

update means for updating the plurality of output signals samples provided with said output means in response to the processing with said processor means of each input signal sample from said sequential input means with the operator signal samples from said filter operator means.

27. A memory system comprising:

signature means for generating a plurality of signature signals;

a memory for storing the plurality of signature signals generated with said signature means; and

a correlation filter processor for generating a memory output signal in response to correlation filter processing of the signature signals stored in said memory, including

reference means for generating a reference signal and

comparing means for comparing the reference signal with each of the plurality of signature signals stored in said memory to generate a plurality of digital output signals.

28. A memory system comprising:

a digital processor for generating a digital input signal as a plurality of digital bits;

modulation means for generating a combination signature signal having a combination of signature signals in response to the digital input signal, wherein each of the combination of signature signals is related to a different one of the plurality of digital bits of the digital input signal; and

a memory for storing the signature signal generated with said modulation means.

29. A memory system comprising:

input means for generating a digital input signal;

modulation means for generating a signature signal in response to the digital input signal;

a memory for storing the signature signal generated with said modulation means; and

demodulation means for generating a digital output signal in response to the signature signal stored in said memory, wherein said demodulation means includes a signature filter for filtering the signature signal to generate the digital output signal.