High-speed wire wrap board

• US 4,494,172 A
• Filed: 01/28/1982
• Issued: 01/15/1985
• Est. Priority Date: 01/28/1982
• Status: Expired due to Term

• Current Assignee: Carlo Gavazzi Incorporated
• Original Assignee: Mupac Corporation
• Inventors: Silverio, Shaun, Leary, Burton
• Primary Examiner(s): NOT, DEFINED
• Application Number:
  US06/343,576
• Time in Patent Office: 1,083 Days
• Field of Search: 174/68.5, 361/414, 361/403, 361/402, 361/307, 361/400
• US Class Current: 361/780
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/0287 having an universal lay-out, e.g. pad or land grid patterns or mesh patterns
• CPC Class Codes: H05K 1/162 incorporating printed capacitors
• CPC Class Codes: H05K 2201/0191 wherein the thickness of the dielectric plays an important role
• CPC Class Codes: H05K 2201/09309 Core having two or more power planes; Capacitive laminate of two power planes
• CPC Class Codes: H05K 2201/09609 Via grid, i.e. two-dimensional array of vias or holes in a single plane interposers H05K2201/10378
• CPC Class Codes: H05K 2201/10287 Metal wires as connectors or conductors
• CPC Class Codes: H05K 2201/10333 Individual female type metallic connector elements
• CPC Class Codes: H05K 3/222 Completing of printed circuits by adding non-printed jumper connections printed jumper connections H05K3/4685
• CPC Class Codes: H05K 3/4641 having integrally laminated metal sheets or special power cores

Abstract

A panel board has a first voltage layer sandwiched between two ground layers at a close spacing to produce a large distributed capacitance; the two ground layers are connected by plated-through conductive holes spaced regularly across the board; a second (exposed) voltage layer is connected by regularly spaced plated-through holes to the first voltage layer, increasing the current carrying capacity of, and reducing the resistance across, the board; the plated-through holes are arranged in rows and columns in a pattern permitting the mounting of decoupling capacitors, at any point on the board, in a position parallel to the rows or parallel to the columns; and a socket terminal can be electrically connected directly to the exposed voltage layer or to the exposed ground layer using a ring connector.

Claims

1. A multilayer panel board comprising

a first electrically conductive layer extending across said board for carrying a first voltage to a plurality of points across said board,

second and third electrically conductive layers for carrying a second voltage different from said first voltage, said first conductive layer being positioned between said second and third conductive layers,

first and second electrically insulative layers separating said first conductive layer respectively from said second and third conductive layers by a distances small enough to produce a large distributed capacitance between said first conductive layer and said second and third conductive layers,

a fourth electrically conductive layer extending across said board for carrying said first voltage, said fourth conductive layer being positioned on the other side of said second conductive layer from said first conductive layer.

a third electrically insulative layer separating said fourth conductive layer from said second conductive layer, and

a plurality of electrical connections between said first and fourth conductive layers, and between said second and third conductive layers, said electrical connections being distributed regularly across said board, for increasing the current carrying capacity of, and for enhancing the uniformity of said first and second voltages across, said board.

2. The board of claim 1 wherein said electrical connections comprise

a first group of conductive paths connecting said second and third conductive layers through said first and second insulative layers and through said first conductive layer, said first group of conductive paths being electrically insulated from said first conductive layer, said first group of conductive paths being located at a number of spaced-apart points across said board,

whereby said second voltage is maintained uniformly across said second and third conductive layers.

3. The board of claim 2 wherein said electrical connections further comprise

a second group of conductive paths connecting said first and fourth conductive layers through said first and third insulative layer and said second conductive layer, said second group of conductive paths being electrically insulated from said second conductive layer, said second group of conductive paths being located at a number of spaced-apart points across said board.

whereby said first voltage is maintained uniformly at all points on said first and fourth conductive layers.

4. The board of claim 3 wherein said conductive paths comprise

holes through said board, each of said holes comprising coaxial hole segments through said first, second, third and fourth conductive layers and through said first, second and third insulative layers, and

electrically conductive plating on the inside surfaces of said hole segments,

said hole segments and said plating for said second group of conductive paths being so arranged that said plating electrically contacts said first and fourth conductive layers and is electrically insulated from said second conductive layer, and

said hole segments and said plating for said first group of conductive paths being so arranged that said plating electrically contacts said second and third conductive layer and is electrically insulated from said first conductive layer.

5. The board of claim 1 wherein said holes are arranged in rows and columns, every other said hole in each of said rows belonging to said first group of conductive paths and every intervening said hole in said row belonging to said second group of conductive paths, and

every other said hole in each of said columns belonging to said first group of conductive paths and every intervening said hole in said column belonging to said second group of conductive paths,

whereby any two-lead electronic component can be mounted anywhere on said board oriented parallel either to said rows or to said columns and with one of said leads connected to one of said first group of conductive paths and the other one of said leads connected to one of said second group of conductive paths.

6. The board of claim 1 wherein

said insulative layers have a number of mounting holes for holding electrical terminals, and one of said conductive layers has a number of clearance holes corresponding to said mounting holes, and

each of said clearance holes is coaxial with, and of slightly larger diameter than, the corresponding one of said mounting holes, said clearance holes being spaced apart across said board, said conductive layer extending across the spaces between said clearance holes, thereby defining and surrounding the clearance holes,

whereby the inductance of said conductive layer is minimized while contact between said terminals and said conductive layer is prevented.

7. The board of claim 6 further comprising

an electrically conductive ring connector coaxial with one said mounting hole, said ring connector overlying said conductive layer and a portion of said insulative layer exposed through said clearance hole associated with said one mounting hole to electrically connect a terminal mounted in said mounting hole directly to said conductive layer.

8. The board of claim 7 further comprising

a terminal having a shaft held in said one mounting hole and a head projecting over said insulative layer, and wherein

said ring connector is mounted around said head in contact with said head and said conductive layer.

9. The board of claim 7 further comprising

a terminal having a shaft held in said one mounting hole and a post for receiving connections, said post projecting beyond said insulative layer, and wherein

said ring connector is mounted around said post in contact with said post and said conductive layer.

10. The board of claim 6 wherein the difference in the diameter of each said clearance hole and the corresponding said mounting hole is less than 0.035 inches.

15. The board of claim 1 or 11 wherein said distance is between about 0.005 inches and about 0.009 inches.

16. The board of claim 1 or 11 wherein said second voltage is at ground level.

17. The board of claim 1 or 11 wherein said large distributed capacitance is at least 0.02 microfarads.

18. The board of claim 1 or 11 wherein said electrical connections comprise a plurality of conductive ground paths and conductive voltage paths through said board.

19. The board of claim 18 wherein each said ground path is spaced no more than 0.8" from the closest adjacent ground path.

20. The board of claim 18 wherein each said voltage path is spaced no more than 0.8" from the closest adjacent voltage path.

21. The board of claim 18 wherein the density of said ground paths across said board is at least 3 paths per square inch.

22. The board of claim 18 wherein the density of said voltage paths across said board is at least 3 paths per square inch.

11. A multilayer panel board comprising

a first electrically conductive layer extending across said board for carrying a first voltage to a plurality of points across said board,

second and third electrically conductive layers for carrying a second voltage different from said first voltage, said first conductive layer being positioned between said second and third conductive layers,

first and second electrically insulative layers separating said first conductive layer respectively from said second and third conductive layers by distances small enough to produce a large distributed capacitance between said first conductive layer and said second and third conductive layers,

a fourth electrically conductive layer extending across said board for carrying said first voltage, said fourth conductive layer being positioned on the other side of said second conductive layer from said first conductive layer,

a third electrically insulative layer separating said fourth conductive layer from said second conductive layer,

electrical connections, between said first and fourth conductive layers and between said second and third conductive layers, for increasing the current carrying capacity of, and decreasing the resistance across, said board, and

an array of electrical connector elements at spaced apart locations across said board, each of said elements being connectable at its said location selectively either to said third conductive layer or to said fourth conductive layer.

12. The board of claim 11 wherein said electrical connector elements comprise terminals mounted in an array of holes through said board, said holes being arranged to insulate said terminals from said conductive layers.

13. The board of claim 12 wherein said elements are each connectable to said third or fourth conductive layer by electrical bridging.

14. The board of claim 13 wherein said electrical bridging comprises a conductive ring.