Non-volatile memory system

• US 4,503,494 A
• Filed: 06/26/1980
• Issued: 03/05/1985
• Est. Priority Date: 06/26/1980
• Status: Expired due to Term

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Hamilton, Stephen P., McFarland, Harry G.
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): Malamud, Ronni S.
• Application Number:
  US06/163,237
• Time in Patent Office: 1,713 Days
• Field of Search: 364/200 MS File, 364/900 MS File
• US Class Current: 365/229
• CPC Class Codes: G06F 1/00 Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00 architectures of general purpose stored program computers G06F15/76
• CPC Class Codes: G06F 9/30043 LOAD or STORE instructions; Clear instruction
• CPC Class Codes: G11C 5/141 Battery and back-up supplies

Abstract

Disclosed is a non-volatile memory system which includes a first power means for providing a main power source; a read/write memory means for storing and retrieving data signals so long as power is provided; and second power means for coupling to the first power means and to the read/write memory means, the second power means including auxiliary power means for providing a second power source; the second power means further including controller means for continuously providing power to the read/write memory means from either the first power means or the auxiliary power means. In the preferred embodiment, the first power means is within a housing, said housing having a compartment for the receipt of a plug-in module, and the second power means and read/write memory means are contained within the plug-in module. Additionally, in the preferred embodiment, the memory means and the second power means exclusive of the second power source are comprised of a single integrated circuit. Furthermore, in the preferred embodiment, the power controller and memory system are coupled to a data processing system such as an electronic calculator.

Claims

1. A non-volatile read/write memory system which derives power from either an external power source or a standby battery source and receives clock signals from an external clock generator comprising:

a single integrated circuit chip having a power switching circuit and a read/write memory located thereon,

said power switching circuit including a clock detection circuit and a steering controller circuit, (a) said clock detection circuit for receiving clock signals from said external clock generator and for producing an enable signal to said steering controller circuit when clock signals are detected, (b) said steering controller circuit having as inputs said enable signal and predetermined voltages from said external power source and said standby battery source and an output which provides continuous power to said read/write memory, including a controllable switch for connecting said predetermined voltage of said external power source to said output when said enable signal is received, at least one forward biased diode coupling said external power source to said output and at least one forward biased diode coupling said standby battery source to said output, whereby

said steering controller circuit produces an output voltage essentially equal to the voltage of said external power source when an enable signal is present at its input and produces an output voltage less than the voltage of said external power source when the enable signal is not present even if the external power source is still present at said predetermined voltage.

2. A non-volatile read/write memory system according to claim 1 such that when the enable signal is not present, the steering controller circuit produces an output voltage which is slightly less than the larger of the voltage of said external power source or the voltage of said standby battery source.

3. A non-volatile read/write memory system according to claim 2, wherein the voltage of said standby battery source is normally less than the voltage of said external power source to thereby prevent power from being drawn from said standby battery source.

4. A non-volatile read/write memory system according to claim 2, wherein the voltage output to the read/write memory is less than the larger of the voltage of said external power source or the voltage of said standby battery source by the magnitude of the voltage drop across the corresponding at least one forward biased diode.

5. A non-volatile read/write memory system according to claim 1, wherein said integrated circuit chip and said standby battery source are in a removable module and said external power source and said external clock generator are within a housing having a compartment for the receipt of such module.

6. A non-volatile read/write memory system which derives power from either an external power source or a standby battery source and receives clock signals from an external clock generator comprising:

a single integrated circuit chip having a power switching circuit and a read/write memory located thereon,

said power switching circuit including a clock detection circuit and a steering controller circuit (a) said clock detection circuit for receiving clock signals from said external clock generator and for producing an enable signal to said steering controller circuit when clock signals are detected, (b) said steering controller circuit having as inputs said enable signal and predetermined voltages from said external power source and said standby battery source and an output which provides continuous power to said read/write memory, including a controllable switch for connecting said predetermined voltage of said external power source to said output when said enable signal is received, at least one forward biased diode coupling said external power source to said output and at least one forward biased diode coupling said standby battery source to said output, whereby

said steering controller circuit produces an output voltage essentially equal to the voltage of said external power source when said enable signal is present and when said enable signal is not present, produces either a first reduced voltage from said external power source when the voltage of said external power source exceeds the voltage of said standby battery source or a second reduced voltage from said battery source when the voltage of said standby battery source exceeds the voltage of said external power source.

7. A non-volatile read/write memory system according to claim 6, wherein said first reduced voltage exceeds the second reduced voltage.