Switched capacitor AM modulator/demodulator

• US 4,504,803 A
• Filed: 06/28/1982
• Issued: 03/12/1985
• Est. Priority Date: 06/28/1982
• Status: Expired due to Fees

• Current Assignee: AG Communication Systems Corp. (Nokia Corporation)
• Original Assignee: GTE Lenkurt Incorporated (Verizon Communications Inc.)
• Inventors: Chang, Chieh, Lee, Man S.
• Primary Examiner(s): LaRoche, Eugene R.
• Assistant Examiner(s): Mis, D. C.
• Application Number:
  US06/393,020
• Time in Patent Office: 988 Days
• Field of Search: 332/9 R, 332/9 T, 332/31 R, 332/31 T, 332/44, 332/45, 332/48, 332/49, 332/56, 329/101, 329/102, 329/109, 329/178, 329/192, 307/265, 307/352, 307/353, 455/46, 455/47, 455/108, 455/109, 455/202, 455/203, 455/204, 455/337, 375/24, 375/41, 375/43, 375/61, 375/77, 375/94, 333/173, 328/150, 328/151
• US Class Current: 332/116
• CPC Class Codes: H03C 1/00 Amplitude modulation H03C5/00, H03C7/00 take precedence

Abstract

A first embodiment of an integrable switched capacitor modulator comprises a differential input operational amplifier A1 having a virtual ground potential impressed on its inverting input terminal; capacitors C1, C2 and C3; and switch means operative for alternately (1) charging C1 with an input voltage while connecting C2 and C3 in series with A1 and across it, respectively, for causing it to produce an inverted version of the input voltage, and (2) discharging C2 and C3 while connecting the sample of the input voltage on C1 across A1 for causing it to output a non-inverted sample of the input voltage. The modulated output signal from A1 is preferrably bandpass filtered to eliminate baseband spectral components fed through A1 when C2 is connected in series with the input terminal thereof. In a second embodiment which is insensitive to feedthrough and which requires only two capacitors C1 and C4, the switch means alternately (1) charges C1 with the input voltage while connecting a prior sample of the input voltage on C4 across A1 for causing it to output an inverted sample of the input voltage, and (2) changes C4 with the input signal while connecting the sample of the input voltage on C1 across A1 in the opposite polarity for causing it to output a non-inverted sample of the input voltage. This embodiment has particular advantage as a demodulator since the built-in sample-and-hold function provides low pass filtering of the output signal of A1.

Claims

1. An integrable switched capacitor circuit capable of performing amplitude modulation and/or demodulation, comprising:

an input line adapted for receiving an input voltage,

an operational amplifier having an input terminal and an output terminal,

first, second and third capacitors C1, C2 and C3 each having one and other sides thereof, and

switch means associated with said capacitors and being alternately-successively operative in first and second non-overlapping switch states which are closed conditions of switching;

operation of said switch means in the first switch state electrically connecting the one and other sides of C1 to said input line and ground, respectively, for charging C1 with the input voltage on said input line, connecting the one and other sides of C2 to said input line and said input terminal, respectively, and connecting the other and one sides of C3 to said input and output terminals, respectively, for producing on said output terminal throughout the first switch state an inverted-continuous version of the input signal that is on said input line;

operation of said switch means in the second switch state resetting the charge on C2 and C3 and electrically connecting the other and one sides of C1 to said input and output terminals for impressing the input signal voltage sample on C1 across said amplifier for causing the output voltage thereof on said output terminal throughout the second switch state to be a non-inverted sample version of the input signal voltage.

2. The circuit according to claim 1 wherein the charge in C2 and C3 is reset by discharging them.

4. The circuit according to claim 2 or 3 wherein said switch means is periodically operative in first and second switch states.

5. The circuit according to claim 4 wherein said amplifier has a virtual ground potential on said input terminal and operates in cooperation with feedback capacitors C1 and C3 as a voltage source.

6. The circuit according to claim 5 wherein said amplifier is a differential input operational amplifier having its non-inverting input terminal electrically connected to ground for impressing a virtual ground potential on its inverting input terminal, which is said input terminal.

7. The circuit according to claim 5 wherein C1 holds the stored charge thereon throughout the second switch state, the stored charge on C1 being reestablished for the input voltage on said input line for each subsequent first switch state.

8. The circuit according to claim 7 wherein C1 holds the stored charge thereon between adjacent first switch states.

9. The circuit according to claim 7 wherein the capacitances of C2 and C3 are the same values.

10. The circuit according to claim 9 wherein said switch means is operative for effectively multiplying one of the continuous input signal voltage and a sample thereof by -K and +K in alternate switch states.

11. The circuit according to claim 10 wherein K=1.

12. The circuit according to claim 11 wherein the time intervals of said first switch states are equal to those of said second switch states.

13. The circuit according to claim 2 wherein said capacitors are integrated capacitors and the one sides thereof are the bottom plates thereof.

3. An integrable switched capacitor circuit for operating as an amplitude modulator or as an amplitude demodulator, comprising:

an input line adapted for receiving an analog input voltage,

an operational amplifier having an input terminal and an output terminal,

first, second and third capacitors C1, C2 and C3, and

switch means alternately operative in first and second non-overlapping switch states, which are closed conditions of switching, for alternately charging C1 with the input voltage on said input line in the first switch state while electrically connecting C2 between said input line and said input terminal and connecting C3 as a feedback capacitor across said amplifier for causing the latter to produce on said output terminal throughout the first switch state an inverted-continuous version of the input signal on said input line; and

electrically discharging C2 and C3 in the second switch state while connecting C1 as a feedback capacitor across said amplifier for producing on said output terminal throughout the second switch state a non-inverted sample of the input voltage.