Laser written chip identification method

• US 4,510,673 A
• Filed: 06/23/1983
• Issued: 04/16/1985
• Est. Priority Date: 06/23/1983
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Shils, Alan J., Ianni, John P. Jr.
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US06/507,311
• Time in Patent Office: 663 Days
• Field of Search: 29/574, 29/575, 29/583, 29/589, 250/566, 235/454, 364/468, 364/478
• US Class Current: 438/15
• CPC Class Codes: B07C 5/3412 according to a code applied to the object which indicates a property of the object, e.g. quality class, contents or incorrect indication sorting according to size measured by light-responsive means B07C5/10; sorting according to optical properties B07C5/342; for packages B65D79/02; for information carriers G06K7/00
• CPC Class Codes: G06K 7/10861 sensing of data fields affixed to objects or articles, e.g. coded labels postal sorting B07C3/14, conveying articles B65G47/48
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 438/94 Laser ablative material removal

Abstract

A system of identifying each chip with identification data that is both human and machine readable. The chip identification is then used in sorting, storing, testing, assembling and failure analysis. The identification usage at these process steps eliminates chip part number mix-up and placement. It provides data used for quality control.

Claims

1. A method of producing a semiconductor device comprising the steps of:

providing a plurality of semiconductor chips on a wafer and testing said chips on said wafer to determine their useability;

writing on each chip identification data that may be read by a human or a machine;

dicing said wafer to separate said chips;

selecting and placing said chips into a storage device and reading said identification data to verify the proper location and orientation of said chips in said storage device;

removing said chips from said storage device and placing said chips on a substrate;

reading said identification data to verify the correct location and orientation of each chip on said substrate and, if incorrect, re-locating and/or re-orienting said chip; and

joining said chips to said substrate.

2. The method of claim 1 further comprising the steps of testing said module and, if unacceptable, removing a defective chip and writing on that chip further identification data indicative of the failure mode of said chip.

3. The method of claim 1 further comprising the step of performing failure analysis on semiconductor devices returned from actual use utilizing said identification data.

4. The method of claim 1, wherein the step of writing identification data comprises the step of writing indicia on the back of said chip indicative of manufacture parameters.

5. The method of claim 4, wherein said writing is a laser written character using a laser scribing tool.

6. The method of claim 1, wherein the step of selecting and placing said chips into a storage device comprises the steps of laser reading said identification data on said chips after said chips have been placed in said storage device and, resorting and/or re-orienting any chip not properly located and/or oriented.

7. The method of claim 6, wherein said storage device is a chip collection bank.

8. The method of claim 1, wherein the step of joining said chips to said substrate comprises the step of reflow soldering terminals on said chip to terminals on said substrate.

9. The method of claim 1, wherein the step of reading comprising non-electric, non-contact reading of said chip identification data.

10. The method of claim 9, wherein said non-electric, non-contact reading is optical scanning of said chip.